SN74HCT240DWR ,Octal Buffers And Line Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HCT240N ,Octal Buffers And Line Drivers With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HCT240NSR ,Octal Buffers And Line Drivers With 3-State Outputslogic diagram (positive logic)1191OE2OE182 9111Y11A1 2Y12A11674131Y21A2 2Y22A21456151Y31A3 2A3 2Y31 ..
SN74HCT240PWR ,Octal Buffers And Line Drivers With 3-State Outputs SCLS174E − MARCH 1984 − REVISED ..
SN74HCT244 ,Octal Buffers And Line Drivers With 3-State OutputsMaximum Ratings.. 411.1 Layout Guidelines.... 116.2 ESD Ratings........ 411.2 Layout Example....... ..
SN74HCT244DB , OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SNF431BS , Programmable Voltage Reference
SNJ5400J ,Quadruple 2-Input Positive-NAND GatesLogic Diagram, Each Gate (Positive Logic)AYB1An IMPORTANT NOTICE at the end of this data sheet addr ..
SNJ5400W ,Quadruple 2-Input Positive-NAND GatesPin Functions (continued)PINI/O DESCRIPTIONCDIP, CFP, SOIC, SO CFPNAME LCCCPDIP, SO, SSOP (SN74xx00 ..
SNJ5401J ,Quadruple 2-Input Positive-NAND Gates With Open-Collector Output
SNJ5401J ,Quadruple 2-Input Positive-NAND Gates With Open-Collector Output
SNJ5402J ,Quadruple 2-Input Positive-NOR Gates
SN74HCT240-SN74HCT240DW-SN74HCT240DWR -SN74HCT240N-SN74HCT240NSR-SN74HCT240PWR
Octal Buffers And Line Drivers With 3-State Outputs
Typical tpd = 12 ns ±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max Inputs Are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or BufferMemory Address Registers
description/ordering informationThese octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HCT240 devices are organized
as two 4-bit buffers/drivers with separate
output-enable (OE) inputs. When OE is low, the
device passes inverted data from the A inputs to
the Y outputs. When OE is high, the outputs are
in the high-impedance state.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
