SN74HC273PWR ,Octal D-Type Flip-Flops With ClearLogic Diagram, Each Flip-Flop (Positive Logic)CCDTGTGQCCCCTGCLK(I)TGCCCCRCopyright 2016, Texas Ins ..
SN74HC273PWRG4 ,Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 SCLS136E–DECEMBER 1982–REVISED JULY 20165 Pin Configuration and FunctionsJ, W, DB, DW N, NS, or PW ..
SN74HC27D ,Triple 3-Input Positive-NOR Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HC27DR ,Triple 3-Input Positive-NOR Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC27N ,Triple 3-Input Positive-NOR Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC27NSR ,Triple 3-Input Positive-NOR Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN75LVDM976DGG ,9-Channel LVD-SCSI Transceiver
SN75LVDM976DGG ,9-Channel LVD-SCSI Transceiver
SN75LVDM977DGG ,9-Channel LVD-SCSI Transceiver
SN75LVDS31 ,HIGH-SPEED DIFFERENTIAL LINE DRIVERSelectrical characteristics of low-voltage differential2A 3 6 2Ysignaling (LVDS). This signaling tec ..
SN75LVDS31 ,HIGH-SPEED DIFFERENTIAL LINE DRIVERSlogic diagram (positive logic)SN75LVDS963882 1Y81A2 1Y 71Z1A 71Z6 62Y33 2Y2A2A 552Z2Z†This symbol i ..
SN75LVDS31DR ,Quad High-Speed Differential Drivers 16-SOIC 0 to 70maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC273-SN74HC273DBLE-SN74HC273DBR-SN74HC273DBRG4-SN74HC273DW-SN74HC273DWG4-SN74HC273DWR-SN74HC273DWRG4-SN74HC273N-SN74HC273N.-SN74HC273NSR-SN74HC273NSRG4-SN74HC273PW-SN74HC273PWR -SN74HC273PWRG4
Octal D-Type Flip-Flops With Clear
CLK(I) TG
Copyright © 2016, Outputs Can Drive Upto10 LSTTL Loads Low Power Consumption, 80-µA Maximum ICC Typicaltpd= 12ns ±4-mA Output Driveat5V Low Input Currentof 1-µA Maximum Contain Eight Flip-Flops With Single-Rail Outputs Direct Clear Input Individual Data Inputto Each Flip-Flop On Products Compliantto MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. OnAll Other Products, Production
Processing Does Not Necessarily Include TestingAll Parameters.
Applications Bufferor Storage Registers Shift Registers Pattern Generators
D-type flip-flops witha direct active low clear (CLR)
input.
Informationat the data (D) inputs meeting the setup
time requirementsis transferredto theQ outputs on
the positive-going edge of the clock (CLK) pulse.
Clock triggering occursata particular voltage level
andis not related directlyto the transition timeof the
positive-going pulse. When CLKisat either the high low level, theD input hasno effectat the output.
Device Information(1)(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Logic Diagram, Each Flip-Flop (Positive Logic)
