SN74HC139PWR ,Dual 2-Line To 4-Line Decoders/Demultiplexers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HC139PWR ,Dual 2-Line To 4-Line Decoders/Demultiplexers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HC14 ,Hex Schmitt-Trigger InvertersMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74HC148 ,8-Line To 3-Line Priority Encoders SCLS109G − MARCH 1984 − REVISED APRIL 2004SN54HC14 ..
SN74HC148D ,8-Line To 3-Line Priority Encodersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC148DG4 ,8-Line To 3-Line Priority Encoders 16-SOIC -40 to 85logic diagram (positive logic)10015EO14GS1111229A0133147A12536476A25EIPin numbers shown are for the ..
SN75ALS176 ,Differential Bus Transceiver SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS SLLS040H – AUGUST 1 ..
SN75ALS176AD ,Differential Bus Transceiverfeatures wide positive and negative common-mode voltage ranges, making the deviceCC suitable for pa ..
SN75ALS176ADR ,Differential Bus Transceiver SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS SLLS040H – AUGUST 1 ..
SN75ALS176ADRG4 ,Differential Bus Transceiver 8-SOIC 0 to 70maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN75ALS176AP ,Differential Bus Transceiverlogic diagram (positive logic)logic symbol33DEDE EN124EN2 DRE26RE4 1A6D7A11 BBusR7B1R2§This symbol ..
SN75ALS176B ,Differential Bus Transceiverfeatures wide positive and negative common-mode voltage ranges, making the deviceCC suitable for pa ..
SN74HC139-SN74HC139D-SN74HC139DBR-SN74HC139DR-SN74HC139N-SN74HC139NSR-SN74HC139PW-SN74HC139PWLE-SN74HC139PWR
Dual 2-Line To 4-Line Decoders/Demultiplexers
Low Power Consumption, 80-µA Max ICC Typical tpd = 10 ns ±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max Incorporate Two Enable Inputs to SimplifyCascading and/or Data Reception
description/ordering informationThe ’HC139 devices are designed for
high-performance memory-decoding or
data-routing applications requiring very short
propagation delay times. In high-performance
memory systems, these decoders can minimize
the effects of system decoding. When employed
with high-speed memories utilizing a fast enable
circuit, the delay time of these decoders and the
enable time of the memory usually are less than
the typical access time of the memory. This means
that the effective system delay introduced by the
decoders is negligible.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
2Y0
2Y1
1Y0
1Y1
1Y21GNC
2Y32Y22G
1Y3
GND
SN54HC139... FK PACKAGE
(TOP VIEW)NC − No internal connection
1Y0
1Y1
1Y2
1Y3
GND
2Y0
2Y1
2Y2
2Y3
