SN74GTLP21395DW ,Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable PolarityFEATURES • Polarity Control Selects True orComplementary Outputs• TI-OPC™ Circuitry Limits Ringing ..
SN74GTLP21395PWR ,Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable PolarityFUNCTIONAL DESCRIPTIONThe output-enable (1OEAB, 1OEBY) and polarity-control (1T/C) inputs control 1 ..
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SN74GTLP21395DW-SN74GTLP21395PWR
Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity
www.ti.com
FEATURES
DGV, DW, OR PW PACKAGE
(TOP VIEW)1OEBY
SN74GTLP21395
TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS
WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITYSCES350C–JUNE 2001–REVISED DECEMBER 2005
Polarity Control Selects Trueor
Complementary Outputs•
TI-OPC™ Circuitry Limits Ringing on
Unevenly Loaded Backplanes •
Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII•
OEC™ Circuitry Improves Signal Integrity and
Reduces Electromagnetic Interference •
ESD Protection Exceeds JESD22 Bidirectional Interface Between GTLP Signal – 2000-V Human-Body Model (A114-A)
Levels and LVTTL Logic Levels – 200-V Machine Model (A115-A) Split LVTTL Port Providesa Feedback Path – 1000-V Charged-Device Model (C101)for Control and Diagnostics Monitoring Y Outputs Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
