SN74GTL16612DLR ,18-Bit LVTTL-to-GTL/GTL+ Universal Bus TransceiversSCBS480K–JUNE 1994–REVISED JULY 2005DESCRIPTION/ORDERING INFORMATION (CONTINUED)Data flow in each d ..
SN74GTL16616 ,17-Bit LVTTL-To-GTL/GTL+ Universal Bus Transceivers With Buffered Clock OutputsLOGIC DIAGRAM (POSITIVE LOGIC)35VREF1OEAB56CEAB55CLKAB2LEAB28LEBA30CLKBA29CEBA27OEBACE3A1 1D54B1C1C ..
SN74GTL16616DGGR ,17-Bit LVTTL-To-GTL/GTL+ Universal Bus Transceivers With Buffered Clock OutputsFEATURESDGG OR DL PACKAGE• Member of the Texas Instruments Widebus™(TOP VIEW)FamilyOEAB 1 56 CEAB• ..
SN74GTL16616DGGR ,17-Bit LVTTL-To-GTL/GTL+ Universal Bus Transceivers With Buffered Clock OutputsMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNIT3.3 V ..
SN74GTL16616DL , 17-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH BUFFERED CLOCK OUTPUTS
SN74GTL16616DLR ,17-Bit LVTTL-To-GTL/GTL+ Universal Bus Transceivers With Buffered Clock OutputsSCBS481H–JUNE 1994–REVISED APRIL 2005DESCRIPTION/ORDERING INFORMATION (CONTINUED)The user has the f ..
SN75189D ,Quadruple Line Receivermaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V (see ..
SN75189DR ,Quadruple Line Receivermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN75189DRG4 ,Quadruple Line Receiver 14-SOIC 0 to 70maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN75189DRG4 ,Quadruple Line Receiver 14-SOIC 0 to 70MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS SLLS095D – SEPTEMBER ..
SN75189N ,Quadruple Line Receivermaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V (see ..
SN75189NSR ,Quadruple Line Receivermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74GTL16612DGGR-SN74GTL16612DL-SN74GTL16612DLR
18-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers
FEATURES SN54GTL16612... WD PACKAGE
SN74GTL16612.
(TOP VIEW)OEAB
LEAB
GND
VCC (3.3 V)
GND
A10
A11
A12
GND
A13
A14
A15
VCC (3.3 V)
A16
A17
GND
A18
OEBA
LEBA
CEAB
CLKAB
GND
VCC (5 V)
GND
B10
B11
B12
GND
B13
B14
B15
VREF
B16
B17
GND
B18
CLKBA
CEBA
DESCRIPTION/ORDERING INFORMATION
SN54GTL16612, SN74GTL16612 Membersof Texas Instruments Widebus™
Family UBT™ Transceivers Combine D-Type Latches
and D-Type Flip-Flops for Operationin
Transparent, Latched, Clocked,
Clock-Enabled Modes OEC™ Circuitry Improves Signal and
Reduces Electromagnetic Interference Translate Between GTL/GTL+ Signal Levels
and LVTTL Logic Levels Support Mixed-Mode (3.3V and Signal
Operation on A-Port and Control Identicalto '16601 Function Ioff Supports Partial-Power-Down
Operation Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors on Port DistributedVCC and GND Pins Minimize
High-Speed Switching Noise Latch-Up Performance Exceeds mA Per
JESD17The 'GTL16612 devices are 18-bit UBT™ transceivers that provide LVTTL-to-GTL/GTL+ and
GTL/GTL+-to-LVTTL signal-level translation. They combine D-type flip-flops and latchesto allow for
transparent, latched, clocked, and clock-enabled modesof data transfer identical the '16601 function. The
devices provide an interface between operatingat LVTTL logic levelsa backplane operatingat
GTL/GTL+ signal levels. Higher-speedisa direct resultof the reduced swing (<1 V), reduced
input threshold levels, and OEC™ circuitry.
The user has the flexibilityof using these devicesat either GTL (VTT= 1.2V and= 0.8V)or the preferred noise margin GTL+ (VTT= 1.5 VREF=1V) signal levels. GTL+is the Instruments derivative Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. TheB port operatesat GTLor levels, while the A-port control inputs are compatible with LVTTL logic levels and are 5-Vis the reference input voltagefor theB port.V) internal VCCV) supplies the LVTTL output buffers.
