
SN74F373DW ,Octal D-type transparent latchesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F373DWR ,Octal D-type transparent latches SN54F373, SN74F373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTSSDFS076A – D2932, MARCH 19 ..
SN74F373DWRG4 ,Octal D-type transparent latches 20-SOIC 0 to 70 SN54F373, SN74F373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTSSDFS076A – D2932, MARCH 19 ..
SN74F373N ,Octal D-type transparent latchesmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F373NSR ,Octal D-type transparent latcheselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F373NSR ,Octal D-type transparent latcheslogic diagram (positive logic)11OE ENOE11LE C111LE3 21D 1D 1Q4 5C12D 2Q21Q7 633D 3Q 1D 1D8 94D 4Q13 ..
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SN75176 , MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
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SN75176AP ,Differential Bus Transceiverfeatures a minimum input impedance of 12 kΩ, an• Receiver Input Hysteresis 50 mV Typinput sensitivi ..
SN75176B ,Differential Bus TransceiverSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN65176B,SN75176BSLL ..
SN74F373-SN74F373DBR-SN74F373DW-SN74F373DWR-SN74F373DWRG4-SN74F373N-SN74F373NSR
Octal D-type transparent latches
Package Options Include PlasticSmall-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
descriptionThese 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches of the ′F373 are transparent
D-type latches. While the latch-enable (LE) input
is high, the Q outputs will follow the data (D) inputs.
When the latch enable is taken low, the Q outputs
are latched at the logic levels set up at the D
inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal
logic state (high or low logic levels) or a
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
The output-enable (OE) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN74F373 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F373 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74F373 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)GND
SN54F373... FK PACKAGE
(TOP VIEW)1QOE
GND