SN74F174AN ,Hex D-Type Flip-Flop With Clearmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F175D ,Quadruple D-Type Flip-Flops With Clearmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F175DR ,Quadruple D-Type Flip-Flops With Clear/sc/package.FUNCTION TABLEINPUTS OUTPUTSCLR CLK D Q QL X X L HH ↑ HH LH ↑ LL HH L X Q Q0 0Please be ..
SN74F175N ,Quadruple D-Type Flip-Flops With Clearlogic diagram (positive logic)9CLK1CLR421D1D1QC13R1QTwo Identical ChannelsNot Shown13154D 1D4QC114R ..
SN74F175NSR ,Quadruple D-Type Flip-Flops With Clearmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74F20 ,Dual 4-input positive-NAND gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN75150 ,Dual Line Driverlogic diagram (positive logic)1S1 ENSÎÎ71Y2ÎÎ2 71Y1A 1AÎÎ632A 2Y6ÎÎ3 2Y2AÎΆThis symbol is in accor ..
SN75150D ,Dual Line Drivermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN75150DR ,Dual Line Driverlogic diagram (positive logic)1S1 ENSÎÎ71Y2ÎÎ2 71Y1A 1AÎÎ632A 2Y6ÎÎ3 2Y2AÎΆThis symbol is in accor ..
SN75150JG ,Dual Line Drivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN75150P ,Dual Line Drivermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN751518FT , DC Plasma Display Drivers
SN74F174A-SN74F174ADR-SN74F174AN
Hex D-Type Flip-Flop With Clear
Shift Registers
Pattern Generators Fully Buffered Outputs for Maximum
Isolation From External Disturbances Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
descriptionThis monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a
direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred
to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level
and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either
the high or low level, the D-input signal has no effect at the output.
The SN74F174A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
logic symbol†31D 42D3D4D 135DCLK
CLR6D 6Q†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
GND
CLK
