SN74F126DR ,Quadruple Bus Buffer Gate With 3-State Outputs/sc/package.FUNCTION TABLE(each buffer)INPUTSOUTPUTYOE AH H HH LLL X ZPlease be aware that an impor ..
SN74F126N ,Quadruple Bus Buffer Gate With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F138 ,3-line to 8-line decoder / demultiplexermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F138D ,3-line to 8-line decoder / demultiplexermaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F138DR ,3-line to 8-line decoder / demultiplexermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F138DRE4 ,3-line to 8-line decoder / demultiplexer 16-SOIC 0 to 70maximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN75117P ,Differential Line Transreceiverlogic diagram (positive logic)logic symbol‡’116‡’116 and SN75118& 4DYP1313 3DE EN DYS DE14 1 4DA D ..
SN75117P ,Differential Line Transreceiverfeatures a differential-input circuit having acommon-mode voltage range of ±15 V. An internal 130-Ω ..
SN75118 ,Differential Line Transceiverlogic diagram (positive logic)logic symbol‡’116‡’116 and SN75118& 4DYP1313 3DE EN DYS DE14 1 4DA D ..
SN75118N ,Differential Line Transceiverfeatures a differential-input circuit having acommon-mode voltage range of ±15 V. An internal 130-Ω ..
SN75119P ,Differential Line Transceiverlogic diagram (positive logic)logic symbol‡’116‡’116 and SN75118& 4DYP1313 3DE EN DYS DE14 1 4DA D ..
SN75119P ,Differential Line Transceiverfeatures a differential-input circuit having acommon-mode voltage range of ±15 V. An internal 130-Ω ..
SN74F126D-SN74F126DR-SN74F126N
Quadruple Bus Buffer Gate With 3-State Outputs
description/ordering informationThe SN74F126 bus buffer features independent
line drivers with 3-state outputs. Each output is
disabled when the associated output-enable (OE)
input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the
driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2OE
GND
3OE
