SN74CBTS3384DBQR ,10-Bit FET Bus Switch With Schottky Diode Clampingmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74CBTS3384DBQR ,10-Bit FET Bus Switch With Schottky Diode Clampinglogic diagram (positive logic)321B11A111 101B51A511OE14 152B12A122 232B52A5132OE†absolute
SN74CBTS3384DBR ,10-Bit FET Bus Switch With Schottky Diode Clamping SN74CBTS3384 10-BIT FET BUS SWITCHWITH SCHOTTKY DIODE CLAMPINGSCDS024M – MAY 1995 – REVISED JULY 2 ..
SN74CBTS3384DBRG4 ,10-Bit FET Bus Switch With Schottky Diode Clamping 24-SSOP -40 to 85/sc/package.FUNCTION TABLE(each 5-bit bus switch)INPUTS INPUTS/OUTPUTS1OE 2OE 1B1–1B5 2B1–2B5L L 1A ..
SN74CBTS3384PW ,10-Bit FET Bus Switch With Schottky Diode Clamping SN74CBTS3384 10-BIT FET BUS SWITCHWITH SCHOTTKY DIODE CLAMPINGSCDS024M – MAY 1995 – REVISED JULY 2 ..
SN74CBTS3384PWR ,10-Bit FET Bus Switch With Schottky Diode Clampingmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74V3680-6PEU ,16384 x 36 Synchronous FIFO MemorySN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 × 36, 2048 × 36, 4096 × 36, 8 ..
SN74V3690-6PEU ,32768 x 36 Synchronous FIFO MemorySN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 × 36, 2048 × 36, 4096 × 36, 8 ..
SN75107A ,Dual Line Receiverlogic diagram (positive logic)6S11A2 41B 1Y51G82G12 92A 2Y112B2POST OFFICE BOX 655303 • DALLAS, TEX ..
SN75107AD ,Dual Line Receiver SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRI ..
SN75107AD ,Dual Line Receivermaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V (see ..
SN75107ADR ,Dual Line Receiver SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRI ..
SN74CBTS3384DBQR-SN74CBTS3384DBR-SN74CBTS3384DBRG4-SN74CBTS3384PW-SN74CBTS3384PWR
10-Bit FET Bus Switch With Schottky Diode Clamping
The SN74CBTS3384 provides ten bits of
high-speed TTL-compatible bus switching with
Schottky diodes on the I/Os to clamp undershoot.
The low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device is organized as two 5-bit bus switches
with separate output-enable (OE) inputs. When
OE is low, the switch is on, and port A is connected
to port B. When OE is high, the switch is open, and
the high-impedance state exists between the two
ports.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each 5-bit bus switch)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1A2
1B2
1B3
1A3
1A4
1B4
1B5
1A5
GND
2A4
2B4
2B3
2A3
2A2
2B2
2B1
2A1
2OE
