SN74CBTLV3861DGVR ,Low-Voltage 10-Bit FET Bus Switchmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74CBTLV3861DWR ,Low-Voltage 10-Bit FET Bus Switchmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74CBTLV3861PW ,Low-Voltage 10-Bit FET Bus Switch SCDS041H − DECEMBER 1997 − REVISED OCTOBER 2003DBQ, DGV, ..
SN74CBTLV3861PWR ,Low-Voltage 10-Bit FET Bus Switch/sc/package.FUNCTION TABLEINPUTFUNCTIONOEL A port = B portH DisconnectPlease be aware that an impor ..
SN74CBTR16861DGGR , 20-BIT FET BUS SWITCH
SN74CBTS16211DGGR ,24-Bit FET Bus Switch With Schottky Diode Clamping SN74CBTS16211 24-BIT FET BUS SWITCHWITH SCHOTTKY DIODE CLAMPINGSCDS050D – MARCH 1998 – REVISED OCT ..
SN74TVC3306DCUR ,Dual Voltage ClampMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNIT(2)V I ..
SN74TVC3306DCURG4 ,Dual Voltage Clamp 8-VSSOP -40 to 85Features 3 DescriptionThe SN74TVC3306 device provides three parallel1• Designed to Be Used in Volta ..
SN74V215-7PAG ,512 x 18 Synchronous FIFO Memory SN74V215, SN74V225, SN74V235, SN74V245 512 × 18, 1024 × 18, 2048 × 18, 4096 × 18DSP-SYNC FIRST-IN ..
SN74V235-7PAG ,2048 x 18 Synchronous FIFO Memory SN74V215, SN74V225, SN74V235, SN74V245 512 × 18, 1024 × 18, 2048 × 18, 4096 × 18DSP-SYNC FIRST-IN ..
SN74V245-10PAG ,4096 x 18 Synchronous FIFO Memory SN74V215, SN74V225, SN74V235, SN74V245 512 × 18, 1024 × 18, 2048 × 18, 4096 × 18DSP-SYNC FIRST-IN ..
SN74V245-10PAG ,4096 x 18 Synchronous FIFO Memory SN74V215, SN74V225, SN74V235, SN74V245 512 × 18, 1024 × 18, 2048 × 18, 4096 × 18DSP-SYNC FIRST-IN ..
SN74CBTLV3861DBQR-SN74CBTLV3861DGVR-SN74CBTLV3861DWR-SN74CBTLV3861PW-SN74CBTLV3861PWR
Low-Voltage 10-Bit FET Bus Switch
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SCDS041H − DECEMBER 1997 − REVISED OCTOBER 2003
5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode
Operation Flow-Through Architecture Optimizes PCB
Layout Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
description/ordering informationThe SN74CBTLV3861 provides ten bits ofhigh-speed bus switching. The low on-state resistance of the switch allows connections to bemade with minimal propagation delay.
The device is organized as one 10-bit bus switch.When output enable (OE ) is low, the 10-bit busswitch is on, and port A is connected to port B.When OE is high, the switch is open, and thehigh-impedance state exists between the twoports.
This device is fully specified for partial-power-down applications using I off . The Ioff feature ensures thatdamaging current will not backflow through the device when it is powered down. The device has isolation duringpower off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB designguidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
DBQ, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)A10
GND
VCC
B10
NC − No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.