SN74CBTD3861DWR ,10-Bit FET Bus Switch With Level Shifting/sc/package.FUNCTION TABLEINPUTFUNCTIONOEL A port = B portH DisconnectPlease be aware that an impor ..
SN74CBTD3861DWR ,10-Bit FET Bus Switch With Level Shifting SN74CBTD3861 10-BIT FET BUS SWITCHWITH LEVEL SHIFTINGSCDS084G – JULY 1998 – REVISED JULY 2002DB, D ..
SN74CBTD3861PW ,10-Bit FET Bus Switch With Level Shiftingmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74CBTD3861PWR ,10-Bit FET Bus Switch With Level Shiftinglogic diagram (positive logic)2 22A1 B111 13A10 B1023OE†absolute
SN74CBTH16211DL ,24-Bit FET Bus Switch With Bus Hold SN74CBTH16211 24-BIT FET BUS SWITCHWITH BUS HOLDSCDS062C – JUNE 1998 – REVISED NOVEMBER 2001DGG, D ..
SN74CBTK16245DGGR ,16-Bit FET Bus Switch With Active-Clamp Undershoot Protection Circuit
SN74S374J ,Octal D-Type Positive Edge Triggered Flip-Flops with 3-State Outputs/sc/package.2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265SN54LS373, SN54LS374, SN54S373, SN54S374, ..
SN74S374N ,Octal D-Type Positive Edge Triggered Flip-Flops with 3-State Outputs SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374OCTAL D-TYPE TRA ..
SN74S38 ,Quad 2-input positive-NAND buffers with open collector outputs
SN74S38 ,Quad 2-input positive-NAND buffers with open collector outputs
SN74S38 ,Quad 2-input positive-NAND buffers with open collector outputs
SN74S38 ,Quad 2-input positive-NAND buffers with open collector outputs
SN74CBTD3861-SN74CBTD3861DBQR -SN74CBTD3861DBR-SN74CBTD3861DGVR-SN74CBTD3861DW-SN74CBTD3861DWR-SN74CBTD3861PW-SN74CBTD3861PWR
10-Bit FET Bus Switch With Level Shifting 24-SSOP -40 to 85
description/ordering informationThe SN74CBTD3861 provides ten bits of
high-speed TTL-compatible bus switching. The
low on-state resistance of the switch allows
connections to be made with minimal propagation
delay. A diode to VCC is integrated on the die to
allow for level shifting from 5-V signals at the
device inputs to 3.3-V signals at the device
outputs.
The device is organized as one 10-bit switch with
a single output-enable (OE) input. When OE is
low, the switch is on, and port A is connected to
port B. When OE is high, the switch is open, and
the high-impedance state exists between the two
ports.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLEA10
GND
B10
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
