SN74CBT16245CDGGR ,16-Bit FET Bus Switch with -2 V Undershoot Protection/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74CBT16245DGGR ,16-Bit FET Bus Switchmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74CBT16245DGGR ,16-Bit FET Bus Switchlogic diagram (positive logic)47 21A1 1B137 121A8 1B8481OE36 132A1 2B126 232A8 2B8252OE†absolute
SN74CBT16245DL ,16-Bit FET Bus Switchmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74CBT16292 ,12-Bit 1-OF-2 FET Multiplexer/Demultiplexer With Internal Pulldown Resistorsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74CBT16292DGGR ,12-Bit 1-OF-2 FET Multiplexer/Demultiplexer With Internal Pulldown ResistorsSN74CBT16292 12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXERWITH INTERNAL PULLDOWN RESISTORSSCDS053E – ..
SN74S00 ,Quad 2-input positive-NAND gates SDLS025D–DECEMBER 1983–REVISED MAY 20175 Pin Configuration and FunctionsSN5400 J, SN54xx00 J and W ..
SN74S00N ,Quad 2-input positive-NAND gatesPin Functions (continued)PINI/O DESCRIPTIONCDIP, CFP, SOIC, SO CFPNAME LCCCPDIP, SO, SSOP (SN74xx00 ..
SN74S00NSR , QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SN74S00NSR , QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SN74S02D ,Quad 2-input positive-NOR gates
SN74S03 ,QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
SN74CBT16245CDGGR
16-Bit FET Bus Switch with -2 V Undershoot Protection
Propagation Delay Low ON-State Resistance (ron)
Characteristics (ron = 3 Ω Typical) Low Input/Output Capacitance Minimizes
Loading and Signal Distortion io(OFF) = 5.5 pF Typical) Data and Control Inputs Provide
Undershoot Clamp Diodes Low Power ConsumptionCC = 3 µA Max) VCC Operating Range From 4 V to 5.5 V Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V) Control Inputs Can be Driven by TTL or
5-V/3.3-V CMOS Outputs Ioff Supports Partial-Power-Down Mode
Operation Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101) Supports Both Digital and Analog
Applications: PCI Interface, Memory
Interleaving, Bus Isolation, Low-Distortion
Signal Gating
description/ordering information
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
1B2
GND
1B3
1B4CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
1A2
GND
1A3
1A4CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
NC − No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
