SN74BCT8374ADW ,Scan Test Device With Octal D-Type Edge-Triggered Flip-FlopsSN54BCT8374A, SN74BCT8374ASCAN TEST DEVICESWITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPSSCBS045E − JU ..
SN74BCT8374ANT , SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SN74CB3Q16210DGGR ,20-Bit FET Bus Switch 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switchfeatures low data I/O capacitance to minimize capacitive loading and signal distortion on the datab ..
SN74CB3Q16210DL ,20-Bit FET Bus Switch 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switch SCDS166 − MAY 2004DGG, DGV, OR DL PACKAG ..
SN74CB3Q16211DGGR ,24-Bit FET 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switchfeatures low data I/O capacitance to minimize capacitive loading and signal distortion on the datab ..
SN74CB3Q16211DGGR ,24-Bit FET 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switch SCDS167 − MAY 2004DGG, DGV, OR DL PACKA ..
SN74LVTH245A ,3.3-V ABT Octal Bus Transceivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LVTH245ADBR ,3.3-V ABT Octal Bus Transceivers With 3-State OutputsSN54LVTH245A, SN74LVTH245A3.3-V ABT OCTAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCBS130T − MAY 1992 − ..
SN74LVTH245ADBR ,3.3-V ABT Octal Bus Transceivers With 3-State Outputslogic diagram (positive logic)1DIR19OE2A118B1To Seven Other ChannelsPin numbers shown are for the D ..
SN74LVTH245ADW ,3.3-V ABT Octal Bus Transceivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LVTH245ADWR ,3.3-V ABT Octal Bus Transceivers With 3-State Outputslogic diagram (positive logic)1DIR19OE2A118B1To Seven Other ChannelsPin numbers shown are for the D ..
SN74LVTH245ANSR ,3.3-V ABT Octal Bus Transceivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74BCT8374ADW
Scan Test Device With Octal D-Type Edge-Triggered Flip-Flops
Compatible With the IEEE Standard1149.1-1990 (JTAG) Test Access Port and
Boundary-Scan Architecture Test Operation Synchronous to Test
Access Port (TAP) Implement Optional Test Reset Signal by
Recognizing a Double-High-Level Voltage
(10 V) on TMS Pin SCOPE Instruction Set
− IEEE Standard 1149.1-1990 Required
Instructions, Optional INTEST , CLAMP,
and HIGHZ
− Parallel-Signature Analysis at Inputs
− Pseudo-Random Pattern Generation
From Outputs
− Sample Inputs/Toggle Outputs Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
descriptionThe ’BCT8374A scan test devices with octal
edge-triggered D-type flip-flops are members of
the Texas Instruments SCOPE testability
integrated-circuit family. This family of devices
supports IEEE Standard 1149.1-1990 boundary
scan to facilitate testing of complex circuit-board
assemblies. Scan access to the test circuitry is
accomplished via the 4-wire test access port
(TAP) interface.
In the normal mode, these devices are functionally equivalent to the ’F374 and ’BCT374 octal D-type flip-flops.
The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device
terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect
the functional operation of the SCOPE octal flip-flops.
In the test mode, the normal operation of the SCOPE octal flip-flops is inhibited and the test circuitry is enabled
to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform
boundary-scan test operations as described in IEEE Standard 1149.1-1990.
GND
TDO
TMS
VCC
TDI
TCK
TDI
TCK
TMS
TDO
CLK4Q
GND6Q7Q4D5DNCV6D7D
SN54BCT8374A...FK PACKAGE
(TOP VIEW)NC − No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
