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SN74AVCH24T245ZRGRTIN/a171avai24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs


SN74AVCH24T245ZRGR ,24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs               SCES588B ..
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SN74AVCH24T245ZRGR
24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs
Overvoltage-Tolerant Inputs/Outputs AllowMixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
Ioff Supports Partial-Power-Down Mode
Operation
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 8000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information

This 24-bit noninverting bus transceiver uses two separate configurable power-supply rails. The
SN74AVCH24T245 is optimized to operate with V CCA/V CCB set at 1.4 V to 3.6 V . It is operational with V CCA/V CCBas low as 1.2 V. The A port is designed to track V CCA. V CCA accepts any supply voltage from 1.2 V to 3.6 V. The
B port is designed to track V CCB. V CCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCH24T245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCH24T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1OE, 2OE,
3OE, 4OE, 5OE, and 6OE) are supplied by V CCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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