SN74AUP1G79DRLR ,Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop 5-SOT -40 to 85Features 3 DescriptionThe AUP family is TI's premier solution to the1• Available in the Texas Instr ..
SN74AUP1G80DBVR ,Low-Power Single Postitive-Edge-Triggered D-Type Flip-Flop SCES593F–JULY 2004–REVISED JULY 20175 Pin Configuration and FunctionsDBV PackageDCK Package5-Pin S ..
SN74AUP1G80DBVT ,Low-Power Single Postitive-Edge-Triggered D-Type Flip-FlopFeatures 3 DescriptionThe AUP family is TI's premier solution to the1• Latch-Up Performance Exceeds ..
SN74AUP1G80DCKR ,Low-Power Single Postitive-Edge-Triggered D-Type Flip-FlopMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74AUP1G80DCKR ,Low-Power Single Postitive-Edge-Triggered D-Type Flip-FlopElectrical Characteristics: T = –40°C to +85°C....... 7A11.2 Layout Example....... 176.7 Timing Req ..
SN74AUP1G80DCKRE4 ,Low-Power Single Postitive-Edge-Triggered D-Type Flip-Flop 5-SC70 -40 to 85Logic Diagram (Positive Logic)CLKCLKQ QD D1An IMPORTANT NOTICE at the end of this data sheet addres ..
SN74LVT16543DGGR ,3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs SCBS148C − MAY 1992 ..
SN74LVT16543DGGR ,3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74LVT16543DL ,3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74LVT16543DL ,3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs SCBS148C − MAY 1992 ..
SN74LVT16646 ,3.3-V ABT 16-Bit Bus Transceivers and Registers With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74LVT16646DL ,3.3-V ABT 16-Bit Bus Transceivers and Registers With 3-State Outputs SCBS149D ..
SN74AUP1G79DCKR-SN74AUP1G79DRLR
Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop
lta
Output
Switching Characteristics25 MHz† Availablein the Texas Instruments NanoStar™
Package Low Static-Power Consumption:
ICC= 0.9 µA Maximum Low Dynamic-Power Consumption:
Cpd=3pF Typicalat 3.3V Low Input Capacitance:= 1.5 pF Typical Low Noise: Overshoot and Undershoot 10%of VCC Ioff Supports Partial Power-Down-Mode Operation Input Hysteresis Allows Slow Input Transition and
Better Switching Noise Immunityat the Input
(Vhys= 250 mV Typicalat 3.3V) Wide Operating VCC Rangeof 0.8Vto 3.6V Optimized for 3.3-V Operation 3.6-V I/O Tolerantto Support Mixed-Mode Signal
Operation tpd=4ns Maximumat 3.3V Suitablefor Point-to-Point Applications Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Performance Tested Per JESD22 2000-V Human-Body Model
(A114-B, ClassII) 1000-V Charged-Device Model (C101)
Applications Barcode Scanner Cable Solutions E-Book Embedded PC Field Transmitter: Temperatureor Pressure Ventilating, and Air Conditioning and Digital
The AUP family is TI's premier solution the
industry's low-power needs in battery-powered
portable applications. This family assures
static and dynamic power consumption the
entire VCC rangeof 0.8Vto 3.6V, thus resultinginan
increased battery life. The AUP devices also
excellent signal integrity.
The SN74AUP1G79 is a single positive-edge-
triggered D-type flip-flop. When dataat (D)
input meets the setup-time requirement, datais
transferredto theQ outputon the positive-going edge the clock pulse. Clock triggering ata
voltage level andis not directly related rise
time of the clock pulse. Following the
interval, dataat theD input can be changed without
affecting the levelsat the outputs.
NanoStar™ package technology major
breakthroughinIC packaging concepts, the die the package.
The SN74AUP1G79 device is fully for
partial-power-down applications using The Ioff
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Power Consumption and Performance
