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Home ›  SS60 > SN74AUC1G74DCTR-SN74AUC1G74DCTRG4-SN74AUC1G74DCUR-SN74AUC1G74DCURG4-SN74AUC1G74YZPR,Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
SN74AUC1G74DCTR-SN74AUC1G74DCTRG4-SN74AUC1G74DCUR-SN74AUC1G74DCURG4-SN74AUC1G74YZPR Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
SN74AUC1G74DCTRTIN/a2840avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
SN74AUC1G74DCTRTEXASN/a3000avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
SN74AUC1G74DCTRG4TIN/a258avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset 8-SM8 -40 to 85
SN74AUC1G74DCURTIN/a100avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
SN74AUC1G74DCURG4TIN/a1avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset 8-VSSOP -40 to 85
SN74AUC1G74YZPRTIN/a43500avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
SN74AUC1G74YZPRTEXASN/a3000avaiSingle Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset


SN74AUC1G74YZPR ,Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and PresetLOGIC DIAGRAM (POSITIVE LOGIC)6CLR1CCLK CC3QTG5C C C QC2D TG TG TGC C C7PREA. Pin numbers shown are ..
SN74AUC1G74YZPR ,Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Presetmaximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
SN74AUC1G79DBVR ,Single Positive-Edge-Triggered D-Type Flip-FlopElectrical Characteristics....... 59.6 Glossary..... 96.6 Timing Requirements... 510 Mechanical, Pa ..
SN74AUC1G79DCKR ,Single Positive-Edge-Triggered D-Type Flip-FlopFeatures 3 DescriptionThis single positive-edge-triggered D-type flip-flop is1• Latch-Up Performanc ..
SN74AUC1G79DCKRG4 ,Single Positive-Edge-Triggered D-Type Flip-Flop 5-SC70 -40 to 85 SCES387L–MARCH 2002–REVISED JUNE 20175 Pin Configuration and FunctionsDBV PackageDCK Package5-Pin ..
SN74AUC1G80DBVR ,Single Positive-Edge-Triggered D-Type Flip-FlopFEATURES• Available in the Texas Instruments • Low Power Consumption, 10-μA Max ICCNanoFree™ Packag ..
SN74LVCU04ANSR , SN74LVCR2245A
SN74LVCU04ANSR , SN74LVCR2245A
SN74LVCU04APW ,Hex InverterSCAS282M–JANUARY 1993–REVISED FEBRUARY 2005(1)Recommended Operating ConditionsMIN MAX UNITOperating ..
SN74LVCU04APWR ,Hex InverterLOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)A Y(1)Absolute
SN74LVCZ161284AGR ,19-Bit IEEE 1284 Std Bus InterfaceSCES358B–SEPTEMBER 2001–REVISED MAY 2005DESCRIPTION/ORDERING INFORMATION (CONTINUED)The power-on re ..
SN74LVCZ161284AGR ,19-Bit IEEE 1284 Std Bus InterfaceFEATURESDGG PACKAGE• Power-On Reset (POR) Prevents Printer(TOP VIEW)Errors When Printer Is Turned O ..


SN74AUC1G74DCTR-SN74AUC1G74DCTRG4-SN74AUC1G74DCUR-SN74AUC1G74DCURG4-SN74AUC1G74YZPR
Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
www.ti.com
FEATURES

See mechanical drawings for dimensions.
CLR31CLK VCC
GND
DCU PACKAGE
(TOP VIEW)

PRE4
DCT PACKAGE
(TOP VIEW)
5CLK VCC
PRED
GND CLR
YZP ORYZT PACKAGE
(BOTTOMVIEW)

GND
VCC
CLK
CLR
PRE
RSE PACKAGE
(TOPVIEW)

CLK
CLR
VCC Q
PRE
GND6 58 3
DESCRIPTION/ORDERING INFORMATION
SN74AUC1G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES537D–DECEMBER 2003–REVISED JUNE 2007
Availablein the Texas Instruments Low Power Consumption, 10-μA Max ICC
NanoFree™ Package
• ±8-mA Output Driveat 1.8V Optimized for 1.8-V Operation andIs 3.6-V I/O Latch-Up Performance Exceeds 100 mA Per
Tolerantto Support Mixed-Mode Signal JESD 78, ClassII
Operation
ESD Protection Exceeds JESD22 Ioff Supports Partial-Power-Down Mode – 2000-V Human-Body Model (A114-A)Operation – 200-V Machine Model (A115-A) Sub-1-V Operable – 1000-V Charged-Device Model (C101) Maxtpdof 1.5nsat 1.8V
This single positive-edge-triggered D-type flip-flopis operational at 0.8-V to 2.7-V VCC, butis designed
specifically for 1.65-Vto 1.95-V VCC operation. low level the
other inputs. time
requirementsa voltage
dataat the for
higher frequencies,
NanoFree™ the
package.
This device
preventing damaging
ic,good price


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