SN74ALVTH32374KR , 2.5-V/3.3-V 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTSSN54ALVTH32374, SN74ALVTH32374 2.5-V/3.3-V 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPSWITH 3-STATE OUTP ..
SN74ALVTHR16245DL ,2.5-V/3.3-V 16-Bit Bus Transceiver With 3-State OutputsSN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCES075D – ..
SN74ALVTHR16245GR ,2.5-V/3.3-V 16-Bit Bus Transceiver With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ALVTHR16245GR ,2.5-V/3.3-V 16-Bit Bus Transceiver With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74AS00 ,Quadruple 2-Input Positive-NAND Gates SDAS187A − APRIL 19 ..
SN74AS00 ,Quadruple 2-Input Positive-NAND Gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74LVC2G157DCUT ,Single 2-Line to 1-Line Data Selector/MultiplexerFeatures... 18.3 Feature Description...... 82 Applications..... 18.4 Device Functional Modes...... ..
SN74LVC2G157YEAR , SINGL 2LINE TO 1LINE DATA SELECTOR/MULTIPLEXER
SN74LVC2G157YEAR , SINGL 2LINE TO 1LINE DATA SELECTOR/MULTIPLEXER
SN74LVC2G157YEPR , SINGL 2LINE TO 1LINE DATA SELECTOR/MULTIPLEXER
SN74LVC2G157YZPR ,Single 2-Line to 1-Line Data Selector/Multiplexerfeatures a common• Supports 5-V V OperationCCstrobe (G) input. When the strobe is high, Y is low• I ..
SN74LVC2G17DBVR ,Dual Schmitt-Trigger BufferFeatures 3 DescriptionThis dual Schmitt-Trigger buffer is designed for 1.65-1• Schmitt-Trigger inpu ..
SN74ALVTH32374KR
2.5-V/3.3-V 32-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs 96-LFBGA -40 to 85
Input and Output Voltages With 2.3-V to
3.6-V VCC) Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C High Drive (–24/24 mA at 2.5-V VCC and
–32/64 mA at 3.3-V VCC) Ioff and Power-Up 3-State Support Hot
Insertion Use Bus Hold on Data Inputs in Place of
External Pullup/Pulldown Resistors to
Prevent the Bus From FloatingNOTE: For tape and reel order entry:
The GKER package is abbreviated to KR.
CC
Minimizes High-Speed Switching Noise ESD Protection Exceeds JESD-22
– 2000-V Human-Body Model
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
(A114-A) Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II Packaged in Plastic Fine-Pitch Ball Grid
Array Package
descriptionThe ’ALVTH32374 devices are 32-bit edge-triggered D-type flip-flops with 3-state outputs designed for 2.5-V
or 3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and
working registers.
These devices can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop. On the positive
transition of the clock (CLK), the Q outputs of the flip-flops take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ALVTH32374 is characterized for operation over the full military temperature range of –55°C to
125°C. The SN74ALVTH32374 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
