SN74ALVCH16601DL ,18-Bit Universal Bus Transceiver With 3-State OutputsMAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
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SN74ALVCH16646DGGR ,16-Bit Bus Transceiver And Register With 3-State OutputsFEATURESDGG, DGV, OR DL PACKAGE• Member of the Texas Instruments Widebus™(TOP VIEW)Family1 561DIR 1 ..
SN74ALVCH16646DGGR ,16-Bit Bus Transceiver And Register With 3-State OutputsSCES032F–JULY 1995–REVISED SEPTEMBER 2004FUNCTION TABLEINPUTS DATA I/OsOPERATION OR FUNCTIONOE DIR ..
SN74ALVCH16646DL ,16-Bit Bus Transceiver And Register With 3-State OutputsSCES032F–JULY 1995–REVISED SEPTEMBER 2004OE DIR CLKAB CLKBA SAB SBA OE DIR CLKAB CLKBA SAB SBAL L X ..
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SN74LVC257ANSR ,Quadruple 2-Line To 1-Line Data Selector/Multiplexer With 3-State OutputsFeatures 3 DescriptionThese quadruple 2-line to 1-line data selectors and1• Operate From 1.65 V to ..
SN74LVC257ANSR ,Quadruple 2-Line To 1-Line Data Selector/Multiplexer With 3-State Outputs SCAS294O–JANUARY 1993–REVISED JUNE 20155 Device OptionsPART NUMBER PACKAGE BODY SIZESN74LVC257ARGY ..
SN74LVC257APW ,Quadruple 2-Line To 1-Line Data Selector/Multiplexer With 3-State Outputs SCAS294O–JANUARY 1993–REVISED JUNE 20155 Device OptionsPART NUMBER PACKAGE BODY SIZESN74LVC257ARGY ..
SN74LVC257APWR ,Quadruple 2-Line To 1-Line Data Selector/Multiplexer With 3-State OutputsMaximum Ratings.. 512 Layout.... 137.2 ESD Ratings........ 512.1 Layout Guidelines.... 137.3 Recomm ..
SN74LVC257APWRG4 ,Quadruple 2-Line To 1-Line Data Selector/Multiplexer With 3-State Outputs 16-TSSOP -40 to 85Logic Diagram (Positive Logic)15OE1A/B21A41Y31B52A72Y62B113A93Y103B144A124Y134BPin numbers shown ar ..
SN74ALVCH16601-SN74ALVCH16601DGGR-SN74ALVCH16601DL
18-Bit Universal Bus Transceiver With 3-State Outputs
FEATURES
DESCRIPTION
DGG OR DL PACKAGE
(TOP VIEW)OEAB
LEAB
GND
VCC
GND
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
OEBA
LEBA
CLKENAB
CLKAB
GND
VCC
GND
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
CLKENBA
SN74ALVCH16601
18-BIT UNIVERSAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS Memberof Texas Instruments Widebus™
Family UBT™ (Universal Bus Transceiver) Combines
D-Type Latches and D-Type Flip-Flops for
Operationin Latched, Clocked, Clock-Enabled Modes EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process ESD Protection Exceeds 2000V Per
MIL-STD-883, 3015; Exceeds 200V
Using Machine Model(C= 200 pF,R=0) Latch-Up Performance Exceeds 250 mA Per
JESD17 Bus Hold on Inputs Eliminates the Need
for External Resistors Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline PackagesThis 18-bit universal transceiveris designed for
1.65-Vto 3.6-V
The SN74ALVCH16601 combines D-type latches and
D-type flip-flops allow data flowin transparent,
latched, and clocked modes.
Data flow in direction is controlled by
output-enable and OEBA), latch-enable
(LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs. The clock can be controlled by the
clock-enable (CLKENAB and CLKENBA) inputs. For
A-to-B data flow, the device operates in the
transparent mode LEABis high. When LEABis
low, theA dataif CLKABis heldata high low logic level. LEABis low, theA datais stored the latch/flip-flop on the low-to-high transitionof
CLKAB. Output OEABis active low. When
OEABis low, the are active. When OEABis
high, the outputsin the high-impedance state.
Data flow forBtois similarto thatofAtoB, but uses OEBA, LEBA, CLKBA, and CLKENBA. ensure the high-impedance state during power upor power down, OE should be tiedto VCC througha pullup the minimum valueof the resistoris determinedby current-sinking capabilityof the driver.to hold unusedor floating inputsata valid logic level. for operation fromto 85°C.