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SN74ALVCH16270-SN74ALVCH16270DGGR-SN74ALVCH16270DL
12-Bit To 24-Bit Registered Bus Exchanger With 3-State Outputs
FEATURES
DESCRIPTION
(TOP VIEW)CLKEN1B
CLKEN2B
OEB
CLKENA2
2B4
GND
2B5
2B6
VCC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
CLKENA1
CLK
SN74ALVCH16270
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER Memberof the Texas Instruments Widebus™
Family EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process Bus Hold on Data Inputs the Need
for External Pullup/Pulldown Resistors ESD Protection ExceedsV Per
MIL-STD-883, Method 3015; 200V
Using Machine Model(C pF,R=0) Latch-Up Performance Exceeds 250 mA Per
JESD17 Package Options Include Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) PackagesThis 12-bit to 24-bit registered bus exchangeris
designed for 1.65-Vto 3.6-V VCC
The SN74ALVCH16270is used in applicationsin
which data must be transferred froma narrow
high-speed bustoa wide lower-frequency bus.
The device provides synchronous data exchange
between the two ports. Dataisin the internal
registers on the low-to-high transition of the clock
(CLK) input when the appropriate CLKEN inputs are
low. The select (SEL) line selects 1Bor 2B data for
the A outputs. For data transfer in the A-to-B
direction,a two-stage pipeline provided in the
A-to-1B path, witha single storage registerin the
A-to-2B path. Proper controlof CLKENA inputs
allows two sequential 12-bit wordsto be presented
synchronously asa 24-bit word theB port. Data
flowis controlled by the active-low output enables
(OEA, OEB). The control terminals are registeredto
synchronize the bus-direction changes with CLK.
line space ensure the high-impedance during power upor power down,a clock shouldbe appliedas soonas
possible, and OE shouldbe tied VCC througha pullup resistor; the minimum valueof the resistoris determined the current-sinking capability the driver. Dueto OE being routed througha register, the active stateof the
outputs cannotbe determined priorto the arrivalof the first clock pulse. bus-hold circuitryis providedto hold unusedor floating data inputsat valid logic level.is characterized for operation from -40°Cto 85°C.
