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SN74ALVCH16240DGGRTEXASN/a12avai16-Bit Buffer/Driver With 3-State Outputs


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SN74ALVCH16240DGGR
16-Bit Buffer/Driver With 3-State Outputs 48-TSSOP -40 to 85
DESCRIPTION
1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
DGG OR DL PACKAGE
(TOP VIEW)
ensure high-impedance state during power up down, OE should be tiedto VCC througha pullup
SN74ALVCH16240
16-BIT BUFFER/DRIVER
Member the Texas Instruments Widebus™
Family
EPIC™ Implanted
CMOS) Process
ESD Protection Exceeds 2000V Per
MIL-STD-883, Method 3015; Exceeds 200V
Using Model(C= 200 pF,R=0)
Latch-Up Performance Exceeds 250 mA Per
JESD
Bus Hold on Data Inputs Eliminates
for External Pullup/Pulldown Resistors
Package Include Plastic 300-mil
Shrink (DL) and Thin
Small-Outline (DGG) Packages

This 16-bitis designed for 1.65-Vto
3.6-V VCC
The SN74ALVCH16240is designed specificallyto
improve the performance and density of 3-state
memory drivers, clock drivers, and
bus-oriented and transmitters.
The device be used as four 4-bit buffers, two
8-bit buffers, one 16-bit buffer.It provides inverting
outputs and symmetrical active-low output-enable
(OE) inputs.
resistor; the valueof the resistoris determined the current-sinking capabilityof the driver.
Active bus-hold circuitryis providedto hold unusedor data inputsata valid logic level.
The SN74ALVCH16240is characterized for operation -40°Cto 85°C.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS OUTPUTOE
L H Z
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