SN74ALVCH162374DLR ,16-Bit Edge-Triggered D-Type Flip-Flop With 3-State OutputsFEATURESDGG OR DL PACKAGE• Member of the Texas Instruments Widebus™(TOP VIEW)Family481 1CLK• Bus Ho ..
SN74ALVCH162374DLR ,16-Bit Edge-Triggered D-Type Flip-Flop With 3-State OutputsSCES092F–JANUARY 1997–REVISED OCTOBER 2004DESCRIPTION/ORDERING INFORMATION (CONTINUED)To ensure the ..
SN74ALVCH162374GR ,16-Bit Edge-Triggered D-Type Flip-Flop With 3-State OutputsLOGIC DIAGRAM (POSITIVE LOGIC)1 242OE1OE25482CLK1CLKC1C1 2 132Q11Q147 361D1D1 1D 2D1To Seven Other ..
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SN74ALVCH16244DGGR ,16-Bit Buffer/Driver With 3-State OutputsSCES014K–JULY 1995–REVISED OCTOBER 2005(1)Absolute
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SN74LVC2244APW ,Octal Buffer/Driver With 3-State OutputsElectrical Characteristics....... 613 Device and Documentation Support........ 127.6 Switching Char ..
SN74LVC2244APWG4 ,Octal Buffer/Driver With 3-State Outputs 20-TSSOP -40 to 85Features list... 1off• Added Applications........ 1• Added Pin Functions table...... 3• Added Handl ..
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SN74LVC2244APWRG4 ,Octal Buffer/Driver With 3-State Outputs 20-TSSOP -40 to 85Features 2 Applications1• Operates From 1.65 V to 3.6 V • Wearable Health and Fitness Devices• Inpu ..
SN74ALVCH162374-SN74ALVCH162374DGGR-SN74ALVCH162374DL-SN74ALVCH162374DLR-SN74ALVCH162374GR
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs
DESCRIPTION/ORDERING INFORMATION
DGG OR DL PACKAGE
(TOP VIEW)1OE
1Q1
1Q2
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK
The outputs, are designedto sinkupto12 mA, equivalent 26-Ω resistorsto reduce overshoot and
SN74ALVCH162374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP Member the Texas Instruments Widebus™
Family Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors 200-V Model (A115-A)This 16-bit D-type flip-flopis designed
for 1.65-V VCC operation.
The SN74ALVCH162374is particularly suitable for
implementing buffer registers, I/O ports, bidirectional
bus drivers, working registers.It can be usedas
two 8-bit or one 16-bit flip-flop. On the
positive transitionof the clock (CLK) input, theQ
outputsof flip-flop take on the logic levels set up the data inputs.
The output-enable (OE) input can be usedto place
the eight outputsin eithera normal logic state (high low logicora high-impedance state.In the
high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance
state and the drive provide the capabilityto
drive bus without need for interfaceor pullup
components. does not affect internal operations the flip-flop. Old data can be retainedor new data
can be entered while the outputs are in the
high-impedance state.
undershoot.
ORDERING PACKAGE(1) PART NUMBER TOP-SIDE MARKINGTube SN74ALVCH162374DLSSOP-DL ALVCH162374to 85°C Tape and reel SN74ALVCH162374DLR
TSSOP- DGG Tape and reel SN74ALVCH162374GR ALVCH162374 quantities, thermal data, symbolization, and PCB design guidelinesare availableat
