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SN74ALVC162836DGGR-SN74ALVC162836DL
20-Bit Universal Bus Driver With 3-State Outputs
FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)GND
Y10
Y11
Y12
Y13
GND
Y14
Y15
Y16
VCC
Y17
Y18
GND
Y19
Y20
CLK
GND
A10
A11
A12
A13
GND
A14
A15
A16
VCC
A17
A18
GND
A19
A20
NC − No internal connection
SN74ALVC162836
20-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS Memberof Texas Instruments Widebus™
Family Operates From 1.65Vto 3.6V Maxtpdofat 3.3V ±12-mA
Output Driveat 3.3V 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)This 20-bit universal bus driveris designed for 1.65-V 3.6-V VCC operation.
Data flow from A to Y is controlled by the
output-enable input. The device operatesin the
transparent mode when the latch-enable (LE) inputis
low. When high, theA datais latchedif the
clock (CLK) heldata highor low logic level.Ifis high, theis storedin the latch/flip-flopon
the low-to-highof CLK. When OEis high,
the outputs are high-impedance state.
The output port includes equivalent 26-Ω series
resistorsto reduce overshoot and undershoot. ensure the state during power up power down, should be tiedto VCC througha
pullup resistor; minimum valueof the resistoris
determined by current-sinking capability of the
driver.
ORDERING INFORMATION PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKINGTubeSSOP-DL ALVC162836Tape and reelto 85°C TSSOP- DGG Tape and reel ALVC162836- DGV Tape and reel VC2836 drawings, packing quantities, symbolization, and PCB design guidelinesare availableat
www.ti.com/sc/package.
