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SN74ALS992DW TIN/a50avai9-Bit D-Type Transparent Read-Back Latches With 3-State Outputs


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SN74ALS992DW
9-Bit D-Type Transparent Read-Back Latches With 3-State Outputs
Applications Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs

description

This 9-bit latch is designed specifically for storing
the contents of the input data bus and providing
the capability of reading back the stored data onto
the input data bus. In addition, this device provides
a 3-state buffer-type output and is easily
implemented in parity applications.
The nine latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow
the data (D) inputs. The Q outputs are in the 3-state condition when the output-enable (OEQ) input is high.
Read back is provided through the output-enable (OERB) input. When OERB is taken low, the data present at
the output of the data latches is allowed to pass back onto the input data bus. When OERB is taken high, the
output of the data latches is isolated from the D inputs. OERB does not affect the internal operation of the latches;
however, precautions should be taken not to create a bus conflict.
The SN74ALS992 is characterized for operation from 0°C to 70°C.
logic symbol†LE 3 4 5 6 7 8 921D
CLROERBOEQ 10 9Q

†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
CLR
GND
OEQ
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