SN74ALS561AN ,Synchronous 4-Bit Binary Counters With 3-State Outputs SN54ALS561A, SN74ALS561A SYNCHRONOUS 4-BIT COUNTERS WITH 3-STATE OUTPUTS SDAS225A – DECEMBER 1982 ..
SN74ALS563BDW ,Octal D-Type Transparent Latches With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS563BN ,Octal D-Type Transparent Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74ALS563BN ,Octal D-Type Transparent Latches With 3-State Outputs SDAS163B − DECEMBER 1982 − ..
SN74ALS564B ,Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs SN54ALS564B, SN74ALS564B OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS164B – AP ..
SN74ALS564BDW ,Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74LVC16244AGQLR ,16-Bit Buffer/Driver With 3-State OutputsFeatures 2 Applications1• Member of the Texas Instruments • ServersWidebus™ Family• PCs and Noteboo ..
SN74LVC16244AGRDR ,16-Bit Buffer/Driver With 3-State Outputs 54-BGA MICROSTAR JUNIOR -40 to 85Electrical Characteristics table...... 8• Added Switching Characteristics table for –40°C TO 125°C ..
SN74LVC16244AZQLR ,16-Bit Buffer/Driver With 3-State OutputsElectrical Characteristics—DC Limit Changes 813 Device and Documentation Support........ 147.6 Swi ..
SN74LVC16245 ,16-Bit Bus Transceiver With 3-State Outputs 48-SSOP -40 to 85
SN74LVC16245A ,16-Bit Bus Transceiver With 3-State OutputsSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN74LVC16245ASCES062 ..
SN74LVC16245ADGGR ,16-Bit Bus Transceiver With 3-State OutputsTable of Contents1
SN74ALS561AN
Synchronous 4-Bit Binary Counters With 3-State Outputs
Internal Look-Ahead Circuitry for FastCascading Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
descriptionThese binary counters are programmable and
offer synchronous and asynchronous clearing as
well as synchronous and asynchronous loading.
All synchronous functions are executed on the
positive-going edge of the clock.
The clear function is initiated by applying a low
level to either asynchronous clear (ACLR) or
synchronous clear (SCLR). ACLR (direct clear)
overrides all other functions of the device, while
SCLR overrides only the other synchronous
functions. Data is loaded from the A, B, C, and D
inputs by applying a low level to asynchronous
load (ALOAD) or by the combination of a low level
at synchronous load (SLOAD) and a
positive-going clock transition. The counting
function is enabled only when enable P (ENP),
enable T (ENT), ACLR, ALOAD, SCLR, and
SLOAD are all high.
A high level at the output-enable (OE) input forces the Q outputs into the high-impedance state, and a low level
enables those outputs. Counting is independent of OE. ENT is fed forward to enable the ripple-carry output
(RCO) to produce a high-level pulse while the count is maximum (15). The clocked carry output (CCO) produces
a high-level pulse for a duration equal to that of the low level of the clock when RCO is high and the counter is
enabled (ENP and ENT are high); otherwise, CCO is low. CCO does not have the glitches commonly associated
with a ripple-carry output. Cascading is normally accomplished by connecting RCO or CCO of the first counter
to ENT of the next counter. However, for very high-speed counting, RCO should be used for cascading because
CCO does not become active until the clock returns to the low level.
The SN54ALS561A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ALS561A is characterized for operation from 0°C to 70°C.
ENP
ACLR
SCLR
GND
CCOC
ENT
SLOAD
CCOB
ENP
ACLRCLKALOAD
ENT
RCO
SCLR
GND
SLOAD
SN54ALS561A... FK PACKAGE
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