SN74ALS29841NT ,10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALS299 ,8-Bit Universal Shift/Storage Registers With 3-State Outputs SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DEC ..
SN74ALS299DW ,8-Bit Universal Shift/Storage Registers With 3-State Outputs SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DEC ..
SN74ALS299DWR ,8-Bit Universal Shift/Storage Registers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS299N ,8-Bit Universal Shift/Storage Registers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74ALS299NSR ,8-Bit Universal Shift/Storage Registers With 3-State Outputslogic diagram (positive logic)1S019S118SL(shift left11SRserial input)(shift rightSixserial input)Id ..
SN74LVC112ADR ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74LVC112ANSR ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetBlock Diagram..... 94 Simplified Schematic 19.3 Feature Description...... 95 Revision History...... ..
SN74LVC112APW ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetMaximum Ratings . 410.2 Typical Application .. 107.2 ESD Ratings........ 411 Power Supply Recommend ..
SN74LVC112APWR ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetElectrical Specifications table. ....... 6• Added Timing Requirements table for –40°C to 125°C temp ..
SN74LVC112APWR ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetFeatures... 1 8 Parameter Measurement Information 82 Applications..... 1 9 Detailed Description. 99 ..
SN74LVC125AD ,Quadruple Bus Buffer Gate With 3-State OutputsTable of Contents9.1 Overview.... 91
SN74ALS29841NT
10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS
