SN74ALS193AN ,4-Bit Synchronous Up/Down Binary Counters With Dual Clock and Clear SDAS211C − DECE ..
SN74ALS20A ,Dual 4-Input Positive-NAND Gateslogic diagram (positive logic)11&1A 1A221B1B6641Y1Y 41C1C551D1D92A92A102B 81012 2Y 2B82C 2Y122C132D ..
SN74ALS20AD ,Dual 4-Input Positive-NAND Gates SDAS192B − APRIL 1982 − REVIS ..
SN74ALS20ADR ,Dual 4-Input Positive-NAND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74ALS20AN ,Dual 4-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS20ANSR ,Dual 4-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV574A ,Octal Edge-Triggered D-Type Flip-Flops With 3-State OutputsSN54LV574A, SN74LV574AOCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPSWITH 3-STATE OUTPUTSSCLS412I − APRIL 19 ..
SN74LV574ADBR ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV574ADGVR ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputslogic diagram (positive logic)1OE11CLKC1191Q21D 1DTo Seven Other ChannelsPin numbers shown are for ..
SN74LV574ADW ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74LV574ANS , OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574APW ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS193AN
4-Bit Synchronous Up/Down Binary Counters With Dual Clock and Clear
Asynchronous Clear Package Options Include PlasticSmall-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
descriptionThe ’ALS193A are synchronous, reversible, 4-bit
up/down binary counters. Synchronous counting
operation is provided by having all flip-flops
clocked simultaneously so that the outputs
change coincident with each other when
instructed by the steering logic. This mode of
operation eliminates the output counting spikes
normally associated with asynchronous (ripple-
clock) counters.
The outputs of the four flip-flops are triggered on
a low-to-high-level transition of either count/clock
(UP or DOWN) input. The direction of the count is
determined by which count input is pulsed while
the other count input is high.
All four counters are fully programmable; that is, each output may be preset to either level by placing a low on
the load (LOAD) input and entering the desired data at the data inputs. The output changes to agree with the
data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers
by simply modifying the count length with the preset inputs.
A high level applied to the clear (CLR) input forces all outputs to the low level. The clear function is independent
of the count and LOAD inputs. The UP, DOWN, and LOAD inputs are buffered to lower the drive requirement,
which significantly reduces the loading on, or current required by, clock drivers, etc., for long parallel words.
These counters are designed to be cascaded without the need for external circuitry. The borrow (BO) output
produces a low-level pulse while the count is zero (all Q outputs low) and the DOWN input is low. Similarily, the
carry (CO) output produces a low-level pulse while the count is 9 or 15 (all Q outputs high) and the UP input
is low. The counters can then be easily cascaded by feeding BO and CO to the count-down and count-up inputs,
respectively, of the succeeding counter.
The SN54ALS193A is characterized for operation over the full military temperature range of −55°C to 125°C.
The SN74ALS193A is characterized for operation from 0°C to 70°C.
