SN74ALB16245DGGR ,16-bit WIDEBUS transceivers SN74ALB16245 3.3-V ALB 16-BIT TRANSCEIVERWITH 3-STATE OUTPUTSSCBS678C – SEPTEMBER 1996 – REVISED J ..
SN74ALB16245DGVR ,16-bit WIDEBUS transceiversmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ALB16245DLR ,16-bit WIDEBUS transceivers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74ALS00A ,Quadruple 2-Input Positive-NAND Gates SDAS187A − APRIL 19 ..
SN74ALS00AD ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74ALS00ADBR ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV139ARGYR ,Dual 2-Line To 4-Line Decoders/Demultiplexers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74LV14 ,Hex Schmitt-Trigger Inverter 14-SSOP -40 to 85
SN74LV14A ,Hex Schmitt-Trigger Inverters
SN74LV14A ,Hex Schmitt-Trigger Inverters
SN74LV14ADBR ,Hex Schmitt-Trigger Inverters
SN74LV14APWRG4 ,Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 125
SN74ALB16245DGGR-SN74ALB16245DGVR-SN74ALB16245DLR
16-bit WIDEBUS transceivers
Schottky Diodes on All Inputs to EliminateOvershoot and Undershoot Industry Standard ’16245 Pinout Distributed VCC and GND Pins Minimize
High-Speed Switching Noise Flow-Through Architecture Optimizes PCB
Layout
descriptionThe SN74ALB16245 is a 16-bit transceiver
designed for high-speed, low-voltage (3.3-V) VCC
operation. This device is intended to replace the
conventional transceiver in any speed-critical
path. The small propagation delay is achieved
using a unity-gain amplifier on the input and
feedback resistors from input to output, which
allows the output to track the input with a small
offset voltage.
This device can be used as two 8-bit transceivers
or one 16-bit transceiver. It allows data
transmission from the A bus to the B bus or from
the B bus to the A bus, depending on the logic level
at the direction-control (DIR) input. The
output-enable (OE) input can be used to disable
the device so that the buses are effectively
isolated.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
