SN74AHCT74DR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and PresetFEATURES • ESD Protection Exceeds JESD 22– 2000-V Human-Body Model (A114-A)• Inputs Are TTL-Voltage ..
SN74AHCT74NSR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Presetmaximum ratings” may cause permanent damage to the device. These are stress ratingsonly, and functi ..
SN74AHCT74PW ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and PresetELECTRICAL CHARACTERISTICSover operating free-air temperature range (unless otherwise noted)T = –40 ..
SN74AHCT74PWR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and PresetSN54AHCT74SN74AHCT74
SN74AHCT74PWRG4 ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-TSSOP -40 to 125ELECTRICAL CHARACTERISTICSover operating free-air temperature range (unless otherwise noted)T = –40 ..
SN74AHCT86D ,Quadruple 2-Input Exclusive-OR GatesFeatures 3 DescriptionThe SNx4AHCT86 devices are quadruple 2-input1• Inputs are TTL-Voltage Compati ..
SN74LV132ADR ,Quadruple Positive-Nand Gates With Schmitt-Trigger InputsFeatures 3 DescriptionThe 'LV132A devices are quadruple positive-NAND1• 2-V to 5.5-V V OperationCCg ..
SN74LV132ANSR ,Quadruple Positive-Nand Gates With Schmitt-Trigger InputsFeatures... 1 9 Detailed Description. 99.1 Overview.... 92 Applications..... 19.2 Functional
SN74LV132APW ,Quadruple Positive-Nand Gates With Schmitt-Trigger InputsLogic Diagram (Positive Logic). 19.4 Device Functional Modes...... 95 Revision History........ 210 ..
SN74LV132APWG4 , QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN74LV132APWR ,Quadruple Positive-Nand Gates With Schmitt-Trigger InputsMaximum Ratings . 411 Power Supply Recommendations... 117.2 ESD Ratings........ 412 Layout.... 117. ..
SN74LV138A ,3-Line To 8-Line Decoders/DemultiplexersMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74AHCT74D-SN74AHCT74DBLE-SN74AHCT74DBR-SN74AHCT74DR-SN74AHCT74NSR-SN74AHCT74PW-SN74AHCT74PWR-SN74AHCT74PWRG4
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset
1CLR
1CLK
1PRE
GND
VCC
2CLR
2CLK
2PRE
PW PACKAGE
(TOP VIEW)201913
2CLK
2PRE
1CLK
1PRE2Q 2CLR
SN54AHCT74FK PACKAGE− No internal connection
SN74AHCT74... RGY PACKAGE
(TOP VIEW) 14 8
2CLR
2CLK
2PRE
1CLK
1PRE
1CLR
GND
SN54AHCT74 . . . J or W PACKAGE
SN74AHCT74 . . . D, DB, DGV, N, NS,• Inputs Are TTL-Voltage Compatible 200-V Machine Model• Latch-Up Performance Exceeds 250 mA Per
JESD17 – 1000-V Charged-Device (C101)
DESCRIPTIONThe ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops. low levelat the preset (PRE)or clear (CLR) inputs setsor resets the outputs, regardlessof the levelsof the
other inputs. When PRE and CLR are inactive (high), dataat the data (D) input meeting the setup time
requirementsis transferredto the outputs on the positive-going edgeof the clock pulse. Clock triggering occursa voltage level andis not directly relatedto the rise timeof the clock pulse. Following the hold-time interval,
dataat theD input canbe changed without affecting the levelsat the outputs.
FUNCTION TABLE
