SN74AHC245QPWRQ1 ,Octal Bus Transceivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHC273 ,Octal D-Type Flip-Flops With Clear SCLS376I–JUNE 1997–REVISED MARCH 20156 Pin Configuration and FunctionsSN54AHC273...JORWPACKAGE SN5 ..
SN74AHC273DBLE ,Octal D-Type Flip-Flops With ClearMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74AHC273DBR ,Octal D-Type Flip-Flops With ClearMaximum Ratings.. 410.2 Typical Application... 117.2 Handling Ratings. 411 Power Supply Recommendat ..
SN74AHC273DGVR ,Octal D-Type Flip-Flops With ClearFeatures 3 DescriptionThese devices are positive-edge-triggered D-type1• Operating Range 2-V to 5.5 ..
SN74AHC273DW ,Octal D-Type Flip-Flops With ClearElectrical Characteristics....... 512.2 Layout Example....... 127.6 Timing Requirements, V = 3.3 V ..
SN74LS540DBR ,Octal Buffers and Line Drivers with 3-State Outputs0 TState Outputsprive Bus Lines or SN54LSS40, SN54L8541 . . . J OR w PACKAGEBuffer Memory Address R ..
SN74LS540DW ,OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTSmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74LS540N ,OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS0 TState Outputsprive Bus Lines or SN54LSS40, SN54L8541 . . . J OR w PACKAGEBuffer Memory Address R ..
SN74LS540NSR ,Octal Buffers and Line Drivers with 3-State Outputslogic diagram (positive logic)'LS540 'LSS41absolute
SN74LS541 ,Octal Buffers and Line Drivers with 3-State Outputs0 TState Outputsprive Bus Lines or SN54LSS40, SN54L8541 . . . J OR w PACKAGEBuffer Memory Address R ..
SN74LS541DW ,Octal buffer/line driver with 3-state outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74AHC245QPWRQ1
Octal Bus Transceivers With 3-State Outputs
description/ordering informationThe SN74AHC245 octal bus transceiver is designed
for asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
This device allows data transmission from the A bus
to the B bus or from the B bus to the A bus, depending
on the logic level at the direction-control (DIR) input.
The output-enable (OE) input can be used to disable
the device so that the buses effectively are isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION� For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com. Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each transceiver)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GND
