SN74AHC16373DGGR ,16-Bit Transparent D-Type Latches With 3-State Outputs SN54AHC16373, SN74AHC16373 16-BIT TRANSPARENT D-TYPE LATCHESWITH 3-STATE OUTPUTSSCLS329G – MARCH 1 ..
SN74AHC16373DGGR ,16-Bit Transparent D-Type Latches With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHC16374 ,16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHC16374DGVR ,16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPSWITH 3-STATE OUTPUTSSCLS330G – M ..
SN74AHC16374DL ,16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHC16541DL ,16-Bit Buffers/Drivers With 3-State Outputs SN54AHC16541, SN74AHC16541 16-BIT BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCLS332F – MARCH 1996 – REVIS ..
SN74LS368AN ,3-state hex bufferSN54/74LS365ASN54/74LS366ASN54/74LS367A3-STATE HEX BUFFERSSN54/74LS368AThese devices are high speed ..
SN74LS368ANSR ,6-bit buffers and line driverslogic diagrams (positive logic)'365A. 'Ls365A '366A. 'Ls366A '367A, 'LS367A '368A, 'LS368AG1 (1) G1 ..
SN74LS368N ,3-STATE HEX BUFFERSSN54/74LS365ASN54/74LS366ASN54/74LS367A3-STATE HEX BUFFERSSN54/74LS368AThese devices are high speed ..
SN74LS37 ,Quad 2-input positive-NAND buffers
SN74LS373 ,Octal Transparent Latch/sc/package.2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265SN54LS373, SN54LS374, SN54S373, SN54S374, ..
SN74LS373DW ,OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374OCTAL D-TYPE TRA ..
SN74AHC16373DGGR
16-Bit Transparent D-Type Latches With 3-State Outputs
CC-
Distributed VCC and GND Pins MinimizeHigh-Speed Switching Noise Flow-Through Architecture Optimizes PCB
Layout Latch-Up Performance Exceeds 250 mA Per
JESD 17 ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
descriptionThe ’AHC16373 devices are 16-bit transparent
D-type latches with 3-state outputs designed
specifically for driving highly capacitive or
relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high,
the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels at the
D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54AHC16373 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74AHC16373 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1Q2
GND
1Q3
1Q4CC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1D2
GND
1D3
1D4CC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2LE
