SN74AHC126PWR ,Quadruple Bus Buffer Gates With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHC132 ,Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs7.2 Handling RatingsMIN MAX UNITT Storage temperature range –65 150 °CstgHuman body model (HBM), pe ..
SN74AHC132D ,Quadruple Positive-NAND Gates With Schmitt-Trigger InputsElectrical Characteristics....... 413 Device and Documentation Support........ 117.6 Switching Char ..
SN74AHC132DR ,Quadruple Positive-NAND Gates With Schmitt-Trigger InputsMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74AHC132PW ,Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs SCLS365H–MAY 1996–REVISED OCTOBER 20146 Pin Configuration and FunctionsSN74AHC132 . . . D, DB, DGV ..
SN74AHC132PWR ,Quadruple Positive-NAND Gates With Schmitt-Trigger InputsFeatures 3 DescriptionThe SN7AHC132 device is a quadruple positive-1• Operating Range 2-V to 5.5-V ..
SN74LS33DR ,Quad 2-input positive-NOR buffers with open collector outputs
SN74LS352N ,DUAL 4-INPUT MULTIPLEXERSN54/74LS352DUAL 4-INPUT MULTIPLEXERThe SN54/74LS352 is a very high-speed Dual 4-input Multiplexer ..
SN74LS353N ,DUAL 4-INPUT MULTIPLEXER WITH 3-STATE OUTPUTSSN54/74LS353DUAL 4-INPUT MULTIPLEXERWITH 3-STATE OUTPUTSThe LSTTL/MSI SN54/74LS353 is a Dual 4-Inpu ..
SN74LS356N ,8-Line To 1-Line Data Selector / Multiplexer / Register 20-PDIP 0 to 70
SN74LS365AN ,3-state hex bufferSN54/74LS365ASN54/74LS366ASN54/74LS367A3-STATE HEX BUFFERSSN54/74LS368AThese devices are high speed ..
SN74LS365ANSR ,Hex Bus Drivers With 3-State Outputslogic diagrams (positive logic)'365A. 'Ls365A '366A. 'Ls366A '367A, 'LS367A '368A, 'LS368AG1 (1) G1 ..
SN74AHC126-SN74AHC126D-SN74AHC126DR-SN74AHC126N-SN74AHC126NSR-SN74AHC126PW-SN74AHC126PWLE-SN74AHC126PWR
Quadruple Bus Buffer Gates With 3-State Outputs
The ’AHC126 devices are quadruple bus buffer
gates featuring independent line drivers with
3-state outputs. Each output is disabled when the
associated output-enable (OE) input is low. When
OE is high, the respective gate passes the data
from the A input to its Y output.
To ensure the high-impedance state during power
up or power down, OE should be tied to GND
through a pulldown resistor; the minimum value of
the resistor is determined by the current-sourcing
capability of the driver.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54AHC126... FK PACKAGE
(TOP VIEW)2OE
GND
3OE
3OE
2OE1OENC3A4OE
GND
NC – No internal connection
