SN74ACT573DWR ,Octal D-Type Transparent Latches With 3-State OutputsSN54ACT573, SN74ACT573OCTAL D-TYPE TRANSPARENT LATCHESWITH 3-STATE OUTPUTSSCAS538D − OCTOBER 1995 ..
SN74ACT573DWRG4 ,Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74ACT573N ,Octal D-Type Transparent Latches With 3-State OutputsSN54ACT573, SN74ACT573OCTAL D-TYPE TRANSPARENT LATCHESWITH 3-STATE OUTPUTSSCAS538D − OCTOBER 1995 ..
SN74ACT573PW ,Octal D-Type Transparent Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ACT573PWR ,Octal D-Type Transparent Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ACT574DBR ,Octal D-Type Edge-Triggered Flip-Flops with 3-State OutputsSN54ACT574, SN74ACT574OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPSWITH 3-STATE OUTPUTSSCAS537D − OCTOBER ..
SN74LS26 ,Quad 2-input high-voltage interface positive-NAND gateslogic diagramY23NC - No internal connection1YY4Y1,=Dy-----"ICC)-2B',1CCC)r------3BICC)-----43positi ..
SN74LS260DR2 ,Dual 5-Input NOR Gate
SN74LS266N ,QUAD 2-INPUT EXCLUSIVE NOR GATE/productcontent for the latest availabilityinformation and additional product content details.TBD: ..
SN74LS266NSR ,Quad 2-input exclusive-NOR gates with open collector outputs17-Mar-2017PACKAGING INFORMATIONOrderable Device Status Package Type Package Pins Package Eco Plan ..
SN74LS26D ,QUAD 2-INPUT NAND BUFFERmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage , ..
SN74LS26D ,QUAD 2-INPUT NAND BUFFER
SN74ACT573DW-SN74ACT573DWG4-SN74ACT573DWR-SN74ACT573DWRG4-SN74ACT573N-SN74ACT573PW-SN74ACT573PWR
Octal D-Type Transparent Latches With 3-State Outputs
SN54ACT573, SN74ACT573
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS538D − OCTOBER 1995 − REVISED OCTOBER 2002
4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 9.5 ns at 5 V Inputs Are TTL-Voltage Compatible
description/ordering informationThese 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in a bus-organized system without need for
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GND
VCC
SN54ACT573 ...J OR W PACKAGE
SN74ACT573... DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)1 2019
9101112131DOE7Q
GND
SN54ACT573... FK PACKAGE
(TOP VIEW)
