SN74AC573PWR ,Octal D-Type Transparent Latches With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AC573PWR ,Octal D-Type Transparent Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AC574 ,Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AC574DWR ,Octal D-Type Edge-Triggered Flip-Flops with 3-State OutputsSN54AC574, SN74AC574OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPSWITH 3-STATE OUTPUTSSCAS541E − OCTOBER 19 ..
SN74AC574NSR ,Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74AC574PW ,Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LS193NSR ,Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear
SN74LS193NSR ,Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear
SN74LS194AN ,4-bit bidirectional universal shift registerSN54/74LS194A4-BIT BIDIRECTIONALUNIVERSAL SHIFT REGISTERThe SN54 /74LS194A is a High Speed 4-Bit Bi ..
SN74LS194AN.. ,4-bit bidirectional universal shift registerfeatures of shift left without external connections andhold (do nothing) modes of operation. It uti ..
SN74LS195A ,LOW POWER SCHOTTKY
SN74LS195AJ , SHIFT REGISTERS WITH J-/K SERIAL INPUTS
SN74AC573DBRG4-SN74AC573DW-SN74AC573DWG4-SN74AC573N-SN74AC573PW-SN74AC573PWR
Octal D-Type Transparent Latches With 3-State Outputs
SN54AC573, SN74AC573
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS542D - OCTOBER 1995 − REVISED OCTOBER 2003
2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9 ns at 5 V 3-State Outputs Drive Bus Lines Directly
description/ordering informationThese 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D Inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal
logic state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in a bus-organized system without need for
interface or pullup components.
OE does not affect the internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GND
VCC
SN54AC573 ...J OR W PACKAGE
SN74AC573... DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)21 2019
9101112131DOE7Q
GND
SN54AC573... FK PACKAGE
(TOP VIEW)
