SN74AC244DW ,Octal Buffers/Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AC244DW ,Octal Buffers/Drivers With 3-State Outputslogic diagram (positive logic)1191OE2OE18 92111Y11A1 2Y12A11674 131Y21A2 2Y22A2146 5151Y31A3 2Y32A3 ..
SN74AC244DWR ,Octal Buffers/Drivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AC244N ,Octal Buffers/Drivers With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74AC244NSR ,Octal Buffers/Drivers With 3-State OutputsSN54AC244, SN74AC244OCTAL BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCAS514E − JUNE 1995 − REVISED OCTOBER ..
SN74AC244PW ,Octal Buffers/Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LS175D ,QUAD D FLIP-FLOP
SN74LS175DR ,Quadruple D-Type Flip-Flops With Clear
SN74LS175MEL ,Quad D Flip-FlopFUNCTIONAL DESCRIPTIONThe LS175 consists of four edge-triggered D flip-flops follow. A LOW input on ..
SN74LS175MR1 ,Quad D Flip-Flop3SN74LS175AC CHARACTERISTICS (T = 25°C)ALimitsSymbol Parameter Unit Test ConditionsMin Typ Maxf Max ..
SN74LS175N ,QUAD D FLIP-FLOPSN54/74LS175QUAD D FLIP-FLOPThe LSTTL /MSI SN54 /74LS175 is a high speed Quad D Flip-Flop. Thedevic ..
SN74LS19 , 4-BIT PARALLEL-ACCESS SHIFT REGISTERS
SN74AC244-SN74AC244DW-SN74AC244DWR-SN74AC244N-SN74AC244NSR-SN74AC244PW-SN74AC244PWG4-SN74AC244PWR
Octal Buffers/Drivers With 3-State Outputs
SN54AC244, SN74AC244
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCAS514E − JUNE 1995 − REVISED OCTOBER 2003
2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 7.5 ns at 5 V
description/ordering informationThese octal buffers and line drivers are designed
specifically to improve the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
The ’AC244 devices are organized as two 4-bit
buffers/drivers with separate output-enable (OE)
inputs. When OE is low, the device passes
noninverted data from the A inputs to the Y
outputs. When OE is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54AC244... J OR W PACKAGE
SN74AC244... DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)21 2019 10111213
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
SN54AC244...FK PACKAGE
(TOP VIEW)2Y41A11OE
1Y42A2
2OE
2Y1
GND
2A1
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
