SN74ABT162245DLR ,16-Bit Bus Transceivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ABT16240A ,16-Bit Buffers/Drivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ABT16240ADGGR ,16-Bit Buffers/Drivers With 3-State Outputslogic diagram (positive logic)1 251OE 3OE47 2 36 131A1 1Y1 3A1 3Y146 3 35 141A2 1Y2 3A2 3Y244 5 33 ..
SN74ABT16240ADGGR ,16-Bit Buffers/Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ABT16240ADL ,16-Bit Buffers/Drivers With 3-State Outputs SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCBS095G – DECEMBER 1991 – ..
SN74ABT16240ADL ,16-Bit Buffers/Drivers With 3-State Outputs SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCBS095G – DECEMBER 1991 – ..
SN74LS08DBR ,Quadruple 2-Input Positive-AND Gates
SN74LS08DBR ,Quadruple 2-Input Positive-AND Gates
SN74LS08DR ,Quadruple 2-Input Positive-AND Gates
SN74LS08DR ,Quadruple 2-Input Positive-AND Gates
SN74LS09 ,Quad 2-input positive-AND gates with open collector outputs
SN74LS09DR ,Quad 2-input positive-AND gates with open collector outputs
SN74ABT162245-SN74ABT162245DGGR-SN74ABT162245DL-SN74ABT162245DLR
16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
Typical VOLP (Output Ground Bounce)<1 V at VCC = 5 V, TA = 25°C Distributed VCC and GND Pins Minimize
High-Speed Switching NoiseIoff Supports Partial-Power-Down Mode
Operation Flow-Through Architecture Optimizes PCB
Layout Latch-Up Performance Exceeds 500 mA Per
JESD 17 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering informationThe ’ABT162245 devices are 16-bit noninverting
3-state transceivers designed for synchronous
two-way communication between data buses.
The control-function implementation minimizes
external timing requirements.
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so that the buses effectively are isolated.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
