SN65LVDS308ZQCR ,QVGA-VGA 27-Bit Display Serial Interface Receiver 48-BGA MICROSTAR JUNIOR -40 to 85FEATURESCLK, and generates an internal high-speed clock at• FlatLink 3G Serial Interface Technology ..
SN65LVDS315RGER ,8-bit Parallel RGB to MIPI? CSI-1 or SMIA CCP Transmitter/Serializer 24-VQFN -40 to 85Features 3 DescriptionThe SN65LVDS315 is a camera serializer that1• MIPI CSI-1 and SMIA CCP Support ..
SN65LVDS31D ,Quad LVDS TransmitterSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN55LVDS31,SN65LVDS3 ..
SN65LVDS31DR ,Quad LVDS Transmitterelectrical characteristics of• Low-Voltage Differential Signaling With Typicallow-voltage different ..
SN65LVDS31DR/ ,Quad LVDS TransmitterFeatures 3 DescriptionThe SN55LVDS31, SN65LVDS31, SN65LVDS3487,1• Meet or Exceed the Requirements o ..
SN65LVDS31DRG4 ,Quad LVDS TransmitterTable of Contents9.2 Functional
SN74HCT00 ,Quadruple 2-Input Positive-NAND Gateslogic diagram (positive logic)AYB†absolute
SN74HCT00D ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HCT00DBR ,Quadruple 2-Input Positive-NAND Gates 14-SSOP -40 to 85maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HCT00DR ,Quadruple 2-Input Positive-NAND GatesSN54HCT00, SN74HCT00QUADRUPLE 2-INPUT POSITIVE-NAND GATESSCLS062D – NOVEMBER 1988 – REVISED AUGUST ..
SN74HCT00N ,Quadruple 2-Input Positive-NAND GatesSN54HCT00, SN74HCT00QUADRUPLE 2-INPUT POSITIVE-NAND GATESSCLS062D – NOVEMBER 1988 – REVISED AUGUST ..
SN74HCT00NSR ,Quadruple 2-Input Positive-NAND GatesSN54HCT00, SN74HCT00QUADRUPLE 2-INPUT POSITIVE-NAND GATESSCLS062D – NOVEMBER 1988 – REVISED AUGUST ..
SN65LVDS308ZQCR
QVGA-VGA 27-Bit Display Serial Interface Receiver
APPLICATIONSFlatlink3Gä
Application
LVDS308
LCD
Driver
Data and3 Control Bits Received Over Two high-speed clock.If no input CLK signalis present,
Differential Data Lines the output busis held static with PCLK and DE held•
SubLVDS Differential Voltage Levels low, whileall other parallel outputs are pulled high.•
Upto 810-Mbps Data Throughput The F/S control input selects betweena slow CMOS•
Three Operating Modesto Conserve Power bus output rise consumption
speedor higher-load
Failsafe onall CMOS Inputs 4-mm×
4-mm Junior™μBGA®
Package With Ball Pitch
Very Low EMI Low-Emission Interface Between Controller and LCD Display
