SN65LVDS301ZQER ,Programmable 27-Bit Display Serial Interface Transmitter 80-BGA MICROSTAR JUNIOR -40 to 85FEATURESSN65LVDS301 with the display. Compared to parallel23• FlatLink™3G serial interface technolo ..
SN65LVDS302ZQER ,Programmable 27-Bit Display Serial Interface Receiver 80-BGA MICROSTAR JUNIOR -40 to 85Features 2 Applications1• Serial Interface Technology • Small Low-Emission Interface between Graphi ..
SN65LVDS308ZQCR ,QVGA-VGA 27-Bit Display Serial Interface Receiver 48-BGA MICROSTAR JUNIOR -40 to 85FEATURESCLK, and generates an internal high-speed clock at• FlatLink 3G Serial Interface Technology ..
SN65LVDS315RGER ,8-bit Parallel RGB to MIPI? CSI-1 or SMIA CCP Transmitter/Serializer 24-VQFN -40 to 85Features 3 DescriptionThe SN65LVDS315 is a camera serializer that1• MIPI CSI-1 and SMIA CCP Support ..
SN65LVDS31D ,Quad LVDS TransmitterSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN55LVDS31,SN65LVDS3 ..
SN65LVDS31DR ,Quad LVDS Transmitterelectrical characteristics of• Low-Voltage Differential Signaling With Typicallow-voltage different ..
SN74HC86PW ,Quadruple 2-Input Exclusive-OR Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HC86PWR ,Quadruple 2-Input Exclusive-OR Gates/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HCT00 ,Quadruple 2-Input Positive-NAND Gateslogic diagram (positive logic)AYB†absolute
SN74HCT00D ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HCT00DBR ,Quadruple 2-Input Positive-NAND Gates 14-SSOP -40 to 85maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HCT00DR ,Quadruple 2-Input Positive-NAND GatesSN54HCT00, SN74HCT00QUADRUPLE 2-INPUT POSITIVE-NAND GATESSCLS062D – NOVEMBER 1988 – REVISED AUGUST ..
SN65LVDS301ZQE-SN65LVDS301ZQER
Programmable 27-Bit Display Serial Interface Transmitter
Application
Processor
with CMOS
Video Interface
LVDS301
DATA
CLK
SN65LVDS301
www.ti.com SLLS681D –FEBRUARY 2006–REVISED AUGUST 2012
PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
Checkfor Samples: SN65LVDS301FPC cabling typically interconnects
1FEATURESSN65LVDS301 with the display. Compared
23• FlatLink™3G serial interface technology signaling, the LVDS301 outputs significantly
Compatible with FlatLink3G receivers suchas the EMIof the interconnect by over
SN65LVDS302 electromagnetic emissionof the device
low and meets the meets SAE J1752/3
• Input supports 24-bit RGB video mode Figure 37)
interfaceThe SN65LVDS301 supports three
• 24-Bit RGB Data,3 Control Bits,1 Parity Bit(Shutdown, Standby and Active)to
and2 Reserved Bits Transmitted over1,2or3 When transmitting, the PLL locks
Differential Lines pixel clock PCLK and generates
• SubLVDS Differential Voltage Levels speed clockat the line rateof the
Effective Data Throughput upto 1755 Mbps parallel data are latched on the rising PCLK as selected by the external
• Three Operating Modesto Conserve Power CPOL. The serialized datais presented
– Active-Mode QVGA 17.4 mW (typ) outputs D0, D1, D2 witha recreated
– Active-Mode VGA 28.8 mW (typ) from the internal high-speed clock, output
output.If PCLK stops, the device
– Shutdown Mode≉≉
0.5 μA (typ) modeto conserve power
– Standby Mode≉≉
0.5 μA (typ)The parallel (CMOS) input bus offers
• Bus Swap for Increased PCB Layout Flexibility feature. The SWAP pin configures
• 1.8-V Supply Voltage the pixel datato be either R[7:0]. G[7:0],
• ESD Rating>2 kV (HBM) HS, DEor B[0:7]. G[0:7], R[0:7], VS,
givesa PCB designer the flexibility
• Typical Application: Cameras, Embedded the busto the host controller pinout
Computers transmitter device on the top sideor
• Pixel Clock Rangeof4 MHz–65 MHz of the PCB.
Failsafe onall CMOS Inputs Packaging:80 Pin 5mm× 5mm μBGA® Very low EMI meets SAE J1752/3 'M'-spec converts 271,3 Sub Low-Voltage serial outputs.It control Ina parity data word. by the pixel
clock (PCLK). The parity) allowsa The serial shift times the pixel- numberof serialis output ona
