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SN65LV1023A-SN65LV1023ADB-SN65LV1023ADB G4-SN65LV1023ADBG4-SN65LV1023ADBR Fast Delivery,Good Price
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Partno	Mfg	Dc	Qty	Available	Descript
SN65LV1023A	TI	N/a	1890	avai	10:1 LVDS Serdes Transmitter 100
SN65LV1023ADB	TI	N/a	5000	avai	10:1 LVDS Serdes Transmitter 100
SN65LV1023ADB G4 |SN65LV1023ADBG4	TI	N/a	5000	avai	10:1 LVDS Serdes Transmitter 100
SN65LV1023ADBG4	TI	N/a	5	avai	10:1 LVDS Serdes Transmitter 100
SN65LV1023ADBR	TI	N/a	10000	avai	10:1 LVDS Serdes Transmitter 100
SN65LV1023ARHBT	TI/热卖	N/a	1352	avai	10:1 LVDS Serdes Transmitter 100

SN65LV1023ADBR ,10:1 LVDS Serdes Transmitter 100SN65LV1023ASN65LV1224B
SN65LV1023ADBRG4 , 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
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SN65LV1023DB ,10:1 LVDS Serdes Transmitter 300-660 Mbps
SN65LV1212DBG4 ,1:10 LVDS Serdes Receiver 100-400 Mbps 28-SSOP -40 to 85FUNCTIONAL DESCRIPTION (continued)When the deserializer detects edge transitions at the LVDS input, ..
SN65LV1212DBR ,1:10 LVDS Serdes Receiver 100-400 MbpsFEATURES DESCRIPTION• 100-Mbps to 400-Mbps Serial LVDS DataThe SN65LV1021 serializer and SN65LV1212 ..
SN74HC573APWR ,Octal Transparent D-Type Latches With 3-State OutputsLogic Diagram (Positive Logic)1OE11LEC1191Q21D1DTo Seven Other ChannelsCopyright 2016, Texas Instr ..
SN74HC573APWRG4 ,Octal Transparent D-Type Latches With 3-State Outputs 20-TSSOP -40 to 85Electrical Characteristics....... 512.2 Related Links.. 136.6 Timing Requirements... 612.3 Receivin ..
SN74HC574 ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HC574APWR , OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTSSN54HC574, SN74HC574OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPSWITH 3-STATE OUTPUTSSCLS148F − DECEMBER 1 ..
SN74HC574DBR ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC574DW ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputslogic diagram (positive logic)1OE11CLKC1191Q21D 1DTo Seven Other Channels†absolute

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SN65LV1023A-SN65LV1023ADB-SN65LV1023ADB G4-SN65LV1023ADBG4-SN65LV1023ADBR-SN65LV1023ARHBT
10:1 LVDS Serdes Transmitter 100
SYNC1
SYNC2
DIN0
DIN1
TCLK
DVCC
DVCC
AVCC
AGND
PWRDN
AGND
DO+
DO−
AGND
AVCC
DGND
DGND
DB Package
Serializer 3130 2928 27 262510 12 141516
DIN1
DIN2
DIN3
DIN4
DIN7
DIN8
AGND
RHB Package
SN65LV1023A
TCLK_R/F
Checkfor Samples: SN65LV1023A SN65LV1224B
1FEATURES
DESCRIPTION• 100-Mbpsto 660-Mbps Serial LVDS Data
Payload Bandwidthat 10-MHzto 66-MHz The SN65LV1023A serializerSystem Clock deserializer comprise a 10-bit
designed to transmit and receive• Pin-Compatible Supersetof LVDS differential backplanesDS92LV1023/DS92LV1224 word rates from 10 MHz• Chipset (Serializer/Deserializer) Power overhead, this translates intoConsumption <450 mW (Typ)at66 MHz between 120-Mbps and 792-Mbps Synchronization Mode for Faster Lock throughput. Lock Indicator Upon power up, the chipset link synchronization mode with• No External Components Required for PLL
SYNC patternsor the deserializer• 28-Pin SSOP and Space Saving5×5 mm QFN synchronize to randomPackages Available synchronization mode, the• Industrial Temperature Qualified, lock within specified, shorter timeTA= −40°Cto 85°C The device can be entered into• Programmable Edge Trigger on Clock when no data transferis required. Alternatively,a Flow-Through Pinout for Easy PCB Layout modeis available to place the output
high-impedance state without losing
APPLICATIONS The SN65LV1023A and SN65LV1224B• Wireless Base Station characterized for operation over Backplane Interconnect temperatureof –40°Cto 85°C. DSLAM