SN54LS107J ,DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN54LS109J ,DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
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SN54LS112J ,DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOPSN54/74LS112ADUAL JK NEGATIVEEDGE-TRIGGERED FLIP-FLOPThe SN54/74LS112A dual JK flip-flop
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SN74GTL16612ADGGR , 18-BIT LVTTL-TO-GTL/GTLPLUS UNIVERSAL BUS TRANSCEIVERS
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SN74GTL16612DGGR ,18-Bit LVTTL-to-GTL/GTL+ Universal Bus TransceiversFEATURESSN54GTL16612. . . WD PACKAGE• Members of Texas Instruments Widebus™SN74GTL16612. . . DGG OR ..
SN54LS107J
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOPThe SN54/74LS107A is a Dual JK Flip-Flop with individual J, K, Direct
Clear and Clock Pulse inputs. Output changes are initiated by the
HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the
other inputs and makes the Q output LOW.
The SN54/74LS107A is the same as the SN54/74LS73A but has corner
power pins.
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
CONNECTION DIAGRAM DIP (TOP VIEW)---- -- ---- -------------
LOGIC SYMBOL- -
GUARANTEED OPERATING RANGES
