SN54HC368J ,Hex Inverting Bus Drivers With 3-State Outputs SCLS310D − JANUARY 1996 ..
SN54HC373 ,Octal D-type Transparent Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN54HC373J ,Octal D-type Transparent Latches With 3-State Outputslogic diagram (positive logic)1OE11LEC121Q31D1DTo Seven Other Channels†absolute
SN54HC374J ,Octal D-type Edge-Triggered Flip-Flops With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN54HC377J ,Octal, Hex, And Quad D-type Flip-Flops With Clock Enable SCLS307B– JANUARY 1996 – REVISED JANUARY ..
SN54HC393J ,Dual 4-Bit Binary Countersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74F280BD ,9-bit odd/even parity generators / checkersmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F280BDR ,9-bit odd/even parity generators / checkersmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F280BN ,9-bit odd/even parity generators / checkerslogic diagram (positive logic)8A9B510Σ EVENC11D12E13F6Σ ODD1G2H4IPin numbers shown are for the D, J ..
SN74F280BNSR ,9-bit odd/even parity generators / checkers SDFS008A − D2932, APRIL 1986 − REVISED OCTOB ..
SN74F280BNSR ,9-bit odd/even parity generators / checkersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F283N ,4-Bit Binary Full Adders With Fast Carrymaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN54HC368J-SNJ54HC368J
Hex Inverting Bus Drivers With 3-State Outputs
Low Power Consumption, 80-µA Max ICC Typical tpd = 10 ns ±6-mA Output Drive at 5 V
Low Input Current of 1 µA Maxdescription/ordering informationThese hex inverting buffers and line drivers are
designed specifically to improve both the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters. The ’HC368 devices
are organized as dual 4-line and 2-line
buffers/drivers with active-low output-enable
(1OE and 2OE) inputs. When OE is low, the
device passes inverted data from the A inputs to
the Y outputs. When OE is high, the outputs are
in the high-impedance state.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
2A2
2Y2
2A1
2Y1
1Y1
1A2
1Y2
1A3
1A11OENC
1Y41A42OE
1Y3
GND
SN54HC368... FK PACKAGE
(TOP VIEW)NC − No internal connection
1Y1
1A2
1Y2
1A3
1Y3
GND
2A2
2Y2
2A1
2Y1
1A4
1Y4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
