SNJ54HC161J ,Synchronous 4-Bit Binary Counterslogic diagram of the D/T flip-flops.Pin numbers shown are for the D, J, N, NS, PW, and W packages.3 ..
SNJ54HC161J ,Synchronous 4-Bit Binary Counterslogic diagram. The uses of these signals are shownon the
SNJ54HC161W ,Synchronous 4-Bit Binary Counterslogic diagram (positive logic)9LOAD10ENT15RCO†LD7ENP†CK2CLKCK LD1CLRRM1G21, 2T/1C3 14QAG43A 3D4RM1G ..
SNJ54HC164J ,8-Bit Parallel-Out Serial Shift Registers SCLS115G–DECEMBER 1982–REVISED SEPTEMBER 20155 Device Comparison TablePART NUMBER PACKAGE BODY SIZ ..
SNJ54HC165J ,Parallel-Load 8-Bit Shift RegistersElectrical Characteristics, SN74HC165 .. 56.8 Switching Characteristics, T = 25°C...... 6 12 Device ..
SNJ54HC166J ,Parallel-Load 8-Bit Shift Registersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SPX4041N , Precision 1.24V Shunt Voltage Reference
SPX432AM , Ultra 1.24V Precision Adjustable Shunt Regulator
SPX432M , Ultra 1.24V Precision Adjustable Shunt Regulator
SPX5205M5 , 150 mA, Low-Noise LDO Voltage Regulator
SPX5205M5-2.5 , 150 mA, Low-Noise LDO Voltage Regulator
SPX5205M5-2.5 , 150 mA, Low-Noise LDO Voltage Regulator
SN54HC161J-SNJ54HC161FK-SNJ54HC161J-SNJ54HC161W
Synchronous 4-Bit Binary Counters
±4-mA Output Drive at 5 V
Synchronously ProgrammableSN54HC161 ...J OR W PACKAGE
SN74HC161... D, N, NS, OR PW PACKAGE
(TOP VIEW)C
SN54HC161... FK PACKAGE
(TOP VIEW)CLKCLRNC
LOAD
ENT
RCO
ENP
GND
CLR
CLK
ENP
GNDCC
RCOB
ENT
LOAD
NC − No internal connection
description/ordering informationThese synchronous, presettable counters feature an internal carry look-ahead for application in high-speed
counting designs. The ’HC161 devices are 4-bit binary counters. Synchronous operation is provided by having
all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed
by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output
counting spikes that are normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK)
input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
