SN54HC03J ,Quadruple 2-Input Positive-NAND Gates With Open-Drain Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC04J ,Hex InvertersMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN54HC05J ,Hex Inverters With Open-Drain OutputsLogic Diagram (Positive Logic)A Y1An IMPORTANT NOTICE at the end of this data sheet addresses avail ..
SN54HC08 ,Quadruple 2-Input Positive-AND GatesElectrical Characteristics: SN54HC08 .... 512.1 Documentation Support.... 126.6
SN54HC08J ,Quadruple 2-Input Positive-AND GatesMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITSup ..
SN54HC109 ,Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset SCLS470A − MARCH ..
SN74F21N ,Dual 4-input positive-AND gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F2245DWR ,Octal bus transceivers with series damping resistors
SN74F240DW ,Octal buffers and line driversmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F240DWR ,Octal buffers and line drivers SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTSSDFS061A – D2932, MARCH 1987 – REVISE ..
SN74F240DWR ,Octal buffers and line driverslogic diagram (positive logic)111OE1OE EN182 18 21Y11A1 1Y1 1A14 161A2 1Y26 141641A3 1Y31Y21A28 121 ..
SN74F240N ,Octal buffers and line driversmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN54HC03J-SNJ54HC03J
Quadruple 2-Input Positive-NAND Gates With Open-Drain Outputs
GNDCC
SN74HC03... D, N, NS, OR PW PACKAGE
(TOP VIEW)1ANC3A4B
GND
(TOP VIEW)NC − No internal connection
description/ordering informationThe ’HC03 devices contain four independent 2-input NAND gates. They perform the Boolean function
Y = A • B or Y = A + B in positive logic. The open-drain outputs require pullup resistors to perform correctly. They
may be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND
functions.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
