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SNJ54ALS373AJTIBBN/a2avaiOctal D-Type Transparent Latches with 3-state Outputs
SN54ALS373AJTIN/a2avaiOctal D-Type Transparent Latches with 3-state Outputs


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SN54ALS373AJ-SNJ54ALS373AJ
Octal D-Type Transparent Latches with 3-state Outputs
pnp Inputs Reduce dc Loading on DataLines
description

These octal transparent D-type latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are off.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GND
SN54ALS373A, SN54AS373... FK PACKAGE
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1QOE
GND
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