SMP80MC-270 ,TELECOM EQUIPMENT PROTECTION: TRISILAPPLICATIONSSMBAny sensitive equipment requiring protection(JEDEC DO-214AA)against lightning strike ..
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SMP80MC-270
TELECOM EQUIPMENT PROTECTION: TRISIL
SMP80MC-270TELECOM EQUIPMENT PROTECTION: TRISIL™ Bidirectional crowbar protection Voltage: 270V Low VBO /VR ratio Micro capacitance 15pF typ@ 50V Low leakage current:IR= 2μA max Holding current:IH= 150 mA min Repetitive peak pulse current:
IPP=80A (10/1000μs)
FEATURESThe SMP80MC-270isa micro capacitance
transient surge arrestor designed for the
protection of high debit rate communication
equipment. Its micro capacitance avoids any
distortionof the signal andis compatible with
digital line cards (xDSL, T1/E1, ISDN...).
DESCRIPTION
SCHEMATIC DIAGRAMAny sensitive equipment requiring protection
against lightning strikes and power crossing: Analog and digital line cards
(xDSL, T1/ E1, ISDN...) Terminals (phone, fax, modem...) and centralof-
fice equipment
MAIN APPLICATIONSTrisils are not subjectto ageing and providea fail safe modein short circuitfora better protection. They are
usedto help equipmentto meet main standards suchas UL1950, IEC950/ CSA C22.2 and UL1459. They
have UL94 V0 approved resin. SMB packageis JEDEC registered (DO-214AA). Trisils are UL497B
approved (file: E136224) and comply with the following standards GR-1089 Core, ITU-T-K20/K21,
VDE0433, VDE0878, IEC61000-4-5 and FCC part 68.
BENEFITS
SMP80MC-270
THERMAL RESISTANCES
IN COMPLIANCES WITH THE FOLLOWING STANDARDS
ELECTRICAL CHARACTERISTICS (Tamb= 25°C)
SMP80MC-270Note1:infail safe mode,the device actsasa shortcircuit.
ABSOLUTE RATINGS (Tamb= 25°C)
Note1: IRmeasuredatVR guarantee VBRmin≥VR
Note4: See functional holding currenttest circuit3
Note2: See functionaltest circuit1
Note5: VR= 50V bias, VRMS=1V, F=1MHz
Note3: Seetest circuit2
Note 6:VR=2V bias,VRMS=1V, F=1MHz
ELECTRICAL PARAMETERS (Tamb= 25°C)
Repetitive peak pulse currenttr: rise time (μs)
tp: pulse duration time (μs)
ex: Pulse waveform 10/1000μs= 10μs tp= 1000μs
SMP80MC-270 (A)TSM1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03
Fig.1: Non repetitive surge peak on-state current
versus overload duration.
[Tj] / I [Tj=25°C]HHFig.3: Relative variationof holding current versus
junction temperature.
[Tj] /V [Tj=25°C]BO BOFig.4: Relative variationof breakover voltage versus
junction temperature.
[Tj] / I [Tj=25°C]RR1.E+00
1.E+01
1.E+02
1.E+03 50 75 100 125
Fig.5: Relative variationof leakage current versus
reverse voltage applied (typical values).
Z/Rth(j-a) th(j-a)1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03
Fig.6: Variationof thermal impedance junctionto
ambient versus pulse duration (Printed circuit board
FR4, SCu=35μm, recommended pad layout).
(A)T100 2345 678
Fig.2: On-state voltage versus on-state current
(typical values)
SMP80MC-270
C [V ] / C [V =2V]RR1.2 10 100 1000
Fig.7: Relative variationof junction capacitance
versus reverse voltage applied (typical values).
TEST CIRCUIT1 FOR DYNAMIC IBO AND VBO PARAMETERS
SMP80MC-270
TEST CIRCUIT2 FOR IBO and VBO parameters:
TEST CIRCUIT3 FORIH PARAMETER
