SMP100LC-230 ,TRISIL FOR HIGH DEBIT RATE TELECOM LINES PROTECTIONAPPLICATIONSSMBAny sensitive equipment requiring protection(JEDEC DO-214AA)against lightning strike ..
SMP100LC-25 ,TRISIL FOR HIGH DEBIT RATE TELECOM LINES PROTECTIONFEATURESn Bidirectional crowbar protectionn Voltage range from 8V to 262Vn Low capacitance from 30 ..
SMP100LC-270 ,TRISIL FOR HIGH DEBIT RATE TELECOM LINES PROTECTION®SMP100LC-xxxTELECOM EQUIPMENT PROTECTION: TRISIL™
SMP100LC-320 ,TRISIL FOR TELECOM EQUIPMENT PROTECTIONSMP100LC®TRISIL™ FOR TELECOM EQUIPMENT PROTECTION
SMP100LC-35 ,TRISIL®SMP100LC-xxxTELECOM EQUIPMENT PROTECTION: TRISIL™
SMP100LC-360 ,TRISIL FOR TELECOM EQUIPMENT PROTECTIONElectrical Characteristics (T = 25°C)ambSymbol ParameterV Stand-off voltageRMVBreakdown voltageBRVB ..
SN74ALS621AN ,Octal Bus Transceivers
SN74ALS622AN , OCTAL BUS TRANSCEIVER
SN74ALS622AN , OCTAL BUS TRANSCEIVER
SN74ALS623ADW ,Octal Bus Transceiversmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74ALS623ADWR , OCTAL BUS TRANSCEIVERS
SN74ALS623AN ,Octal Bus Transceiversmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SMP100LC-120-SMP100LC-140-SMP100LC-160-SMP100LC-200-SMP100LC-230-SMP100LC-25-SMP100LC-270-SMP100LC-35-SMP100LC-65-SMP100LC-8-SMP100LC-90
TRISIL FOR HIGH DEBIT RATE TELECOM LINES PROTECTION
SMP100LC-xxxTELECOM EQUIPMENT PROTECTION: TRISIL™ Bidirectional crowbar protection Voltage range from 8Vto 262V Low capacitance from30pFto 45pF typ@ 50V Low leakage current:IR =2 μA max Holding current:IH= 150 mA min Repetitive peak pulse current:
IPP= 100A (10/1000μs)
FEATURESThe SMP100LC-xxx series is a low
capacitance transient surge arrestor designed
for the protection of high debit rate
communication equipment.Its low capacitance
avoids any distortion of the signal and is
compatible with digital line cards (xDSL,
T1/E1, ISDN...).
DESCRIPTION
SCHEMATIC DIAGRAMAny sensitive equipment requiring protection
against lightning strikes and power crossing: Analog and digital line cards
(xDSL, T1/ E1, ISDN...) Terminals (phone, fax, modem...) and centralof-
fice equipment
MAIN APPLICATIONSTrisils are not subjectto ageing and providea fail safe modein short circuitfora better protection. They are
usedto help equipmentto meet main standards suchas UL1950, IEC950/ CSA C22.2 and UL1459. They
have UL94 V0 approved resin. SMB packageis JEDEC registered (DO-214AA). Trisils are UL497B
approved (file: E136224) and comply with the following standards GR-1089 Core, ITU-T-K20/K21,
VDE0433, VDE0878, IEC61000-4-5 and FCC part 68.
BENEFITS
SMP100LC-xxx
THERMAL RESISTANCES
IN COMPLIANCES WITH THE FOLLOWING STANDARDS
ELECTRICAL CHARACTERISTICS (Tamb= 25°C)
SMP100LC-xxxNote1:infail safe mode,the device actsasa shortcircuit.
ABSOLUTE RATINGS (Tamb= 25°C)
Note1: IR measuredatVR guarantee VBRmin≥VR
Note4: See funtionalholding currenttest circuit3
Note2: See functionaltest circuit1
Note5: VR= 50V bias,VRMS=1V, F=1MHz
Note3: Seetest circuit2
Note 6:VR=2V bias, VRMS=1V,F=1MHz
ELECTRICAL PARAMETERS (Tamb= 25°C)
Repetitive peak pulse currenttr: rise time (μs)
tp: pulse duration time (μs)
ex: Pulse waveform 10/1000μs= 10μs tp= 1000μs
SMP100LC-xxx1E-2 1E-1 1E+0 1E+1 1E+2 1E+30
ITSM(A)
Fig.1: Non repetitive surge peak on-state current
versus overload duration(Tj initial=25 °C).
-25 0 25 50 75 100 1250.0
IH[Tj] / IH[Tj=25°C]
Fig.3: Relative variationof holding current versus
junction temperature.
-25 0 25 50 75 100 1250.96
VBO[Tj] / VBO[Tj=25°C]
Fig.4: Relative variationof breakover voltage versus
junction temperature. 50 75 100 1251
IRM[Tj] / IRM[Tj=25°C]
Fig.5: Relative variationof leakage current versus
junction temperature (typical values).
1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+21
Zth(j-a)(°CW)
Fig.6: Variationof thermal impedance junctionto
ambient versus pulse duration (Printed circuit board
FR4, SCu=35μm, recommended pad layout).
1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.01
IT(A)
Fig.2: On-state voltage versus on-state current
(typical values)
SMP100LC-xxx 2 5 10 20 50 100 3000.0
C [VR] / C [VR=2V]
Fig.7: Relative variationof junction capacitance
versus reverse voltage applied (typical values).
TEST CIRCUIT1 FOR DYNAMIC IBO AND VBO PARAMETERS
SMP100LC-xxx
TEST CIRCUIT2 FOR IBO and VBO parameters:
TEST CIRCUIT3 FORIH PARAMETER
