SG2524-SG2524P Fast Delivery |IC PHOENIX CO.,LIMITED

SG2524P ,REGULATING PULSE WIDTH MODULATORSapplications inwhich the frequency is equal to that of the oscilla-tor. The output of the error amp ..
SG2525 ,REGULATING PULSE WIDTH MODULATORSSG2525ASG3525A®REGULATING PULSE WIDTH MODULATORS. 8 TO 35 V OPERATION.5.1 V REFERENCE TRIMMED TO ± ..
SG2525A ,REGULATING PULSE WIDTH MODULATORSG2525ASG3525A REGULATING PULSE WIDTH MODULATORS.8 TO 35 V OPERATION. 5.1 V REFERENCE TRIMMED TO ± ..
SG2525AJ , REGULATING PULSE WIDTH MODULATOR
SG2525AJ , REGULATING PULSE WIDTH MODULATOR
SG2525AN ,Voltage Mode PWMsSG2525ASG3525A®REGULATING PULSE WIDTH MODULATORS. 8 TO 35 V OPERATION.5.1 V REFERENCE TRIMMED TO ± ..
SI7860DP ,N-Channel Reduced Qg, Fast Switching MOSFETS-20461—Rev. A, 15-Apr-021Si7860DPNew ProductVishay SiliconixMOSFET SPECIFICATIONS (T = 25C UNLESS ..
SI7862DP ,N-Channel 16-V (D-S) MOSFETS-05459—Rev. A, 21-Jan-021Si7862DPNew ProductVishay Siliconix ..
SI7864DP ,N-Channel 20-V (D-S) MOSFETS-05628—Rev. A, 11-Feb-021Si7864DPNew ProductVishay Siliconix ..
SI7866DP ,N-Channel 20-V (D-S) MOSFETS-21412—Rev. B, 05-Aug-021Si7866DPNew ProductVishay SiliconixSPECIFICATIONS (T = 25C UNLESS OTHERW ..
SI7868ADP , Si7868ADP vs. Si7868DP Specification Comparison
SI7868DP ,N-Channel 20-V (D-S) MOSFETS-03130—Rev. B, 22-Jan-031Si7868DPNew ProductVishay SiliconixSPECIFICATIONS (T = 25C UNLESS OTHERW ..

SG2524-SG2524P
REGULATING PULSE WIDTH MODULATOR
SG2524
SG3524
REGULATING PULSE WIDTH MODULATORS
COMPLETE PWM POWER CONTROL CIR-
CUITRY
UNCOMMITTED OUTPUTS FOR SINGLE-
ENDED OR PUSH PULL APPLICATIONS
LOW STANDBY CURRENT 8mA TYPICAL
OPERATION UP TO 300KHz MAXIMUM TEMPERATURE VARIATION REFERENCE VOLTAGE
DESCRIPTION
The SG2524, and SG3524 incorporateona sin-
gle monolithic chipall the function requiredfor the
constructionof regulating power suppies inverters switching regulators. They can alsobe usedas
the control elementfor high power-output applica-
tions. The SG3524 family was designed for
switching regulators of either polarity, trans-
former-coupled dc-to-dc converters, transformer-
less voltage doublers and polarity converter appli-
cations employing fixed-frequency, pulse-width
modulation techniques. The dual alternating out-
puts allows either single-endedor push-pull appli-
cations. Each device includes an on-ship refer-
ence, error amplifier, programmable oscillator,
pulse-steering flip flop, two uncommitted output
transistors,a high-gain comparator, and current-
limiting andshut-down circuitry.
June 2000
BLOCK DIAGRAM
DIP16 SO16
ORDERING NUMBERS: SG2524N (DIP16)
SG3524N (DIP16)
SG2524P (SO16)
SG3524P (SO16)
1/9
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VIN Supply Voltage 40 V Collector Output Current 100 mA Reference Output Current 50 mA Current ThroughCT Terminal –5 mA
Ptot Total Power Dissipationat Tamb =70°C 1000 mW
Tstg Storage Temperature Range –65 to150 °C
Top Operating Ambient Temperature Range: SG2524
SG3524
–25to85
0to70
THERMAL DATA
Symbol Parameter DIP16 SO16 Unit
Rth j-amb
Rth j-alumina
Thermal ResistanceJunction-ambient Max.
Thermal ResistanceJunction-alumina (*) Max.
°C/W
°C/W
(*)Thermal resistance junction-alumina withthe device soldered onthe middleofanalumina supportingsubstrate measuring 15x 20mm;
0.65mmthickness withinfiniteheatsink.
PIN CONNECTION (Top view)
SG2524- SG3524
2/9
ELECTRICAL CHARACTERISTICS (unless otherwise stated, these specifications apply forTj= -25to
+85°C for the SG2524, and0to 70°C for the SG3524, VIN= 20V,andf= 20KHz).
Symbol Parameter Test Condition SG2524 SG3524 Unit
Min. Typ. Max. Min. Typ. Max.
REFERENCE SECTION
VREF Output Voltage 4.8 5 5.2 4.6 5 5.4 V
ΔVREF Line Regulation VIN=8to 40V 10 20 10 30 mV
ΔVREF Load Regulation IL=0to 20mA 20 50 20 50 mV
Ripple Rejection f= 120Hz,Tj =25°C66 66 dB
Short Circuit Current
Limit
VREF =0,Tj =25°C 100 100 mA
ΔVREF/ΔT Temperature Stability Over Operating
Temperature range
0.3 1 0.3 1 %
ΔVREF Long Term Stability Tj= 125°C,t= 1000Hrs 20 20 mV
OSCILLATOR SECTION
fMAX Maximum Frequency CT= 0.001μF,RT =2KΩ 300 300 KHz
Initial Accuracy RT andCT Constant 5 5 %
Voltage Stability VIN=8to 40V,Tj =25°C1 1 %
Δf/ΔT Temperature Stability Over Operating
Temperature Range %
Output Amplitude Pin3,Tj =25°C 3.5 3.5 V
Output Pulse Width CT= 0.01μF,Tj =25°C 0.5 0.5 μs
ERROR AMPLIFIER SECTION
VOS Input Offset Voltage VCM= 2.5V 0.5 5 2 10 mV Input Bias Current 2 10 2 10 μA Open Loop Voltage Gain 72 80 60 80 dB
CMV Common Mode Voltage Tj =25°C 1.8 3.4 1.8 3.4 V
CMR Common Mode Rejection Tj =25°C70 70 dB Small Signal Bandwidth AV= 0dB,Tj =25°C 3 3 MHz Output Voltage Tj =25°C 0.5 3.8 0.5 3.8 V
COMPARATOR SECTION
Duty-cycle % Each OutputOn 0 45 0 45 %
VIT Input Threshold Zero Duty-cycle 1 1 V
Maximum Duty-cycle 3.5 3.5 V Input Bias Current 1 1 μA
CURRENT LIMITING SECTION
Sense Voltage Pin9=2V with Error
Amp. Setfor Max. Out. =25°C
190 200 210 180 200 220 mV
Sense VoltageT.C. 0.2 0.2 mV/°C
CMV Common Mode Voltage –1 1 –1 1
OUTPUT SECTION(each output)
Collector-emitter Voltage 40 40 V
Collector Leackage Curr. VCE= 40V 0.1 50 0.1 50 μA
Saturation Voltage IC= 50mA 1 2 1 2 V
Emitter Output Voltage VIN= 20V 17 18 17 18 V Rise Time RC =2KΩ,Tj =25°C 0.2 0.2 μs Fall Time RC =2KΩ,Tj =25°C 0.1 0.1 μs(*) Total Standby Current VIN= 40V 8 10 8 10 mA
(*) Excluding oscillatorcharging current, error and current limit dividers, and with outputs open.
SG2524- SG3524
3/9
Figure1: Open-loop Voltage Amplificationof
Error Amplifier vs. Frequency
Figure2: Oscillator Frequency vs. Timing
Components.
Figure3: Output Dead Time vs. Timing
Capacitance Value.
Figure4: Output Saturation Voltage vs. load
Current.
Figure5: Open Loop Test Circuit.
SG2524- SG3524
4/9
PRINCIPLES OF OPERATION
The SG2524/3524isa fixed frequency pulse-
with-modulation voltage regulator control circuit.
The regulator operatesata frequency thatis pro-
grammedby one timing resistor (RT) and one tim-
ing capacitor (CT). RT establisheda constant
charging current for CT. This resultsina linear
voltage rampat CT, whichis fedto the compara-
tor providing linear controlof the output pulse
width by the error amplifier. the SG2524/3524
contains,an on-board5V regulatorthat servesas reference as well as powering the
SG2524/3524’s internal control circuitry andis
also usefulin supplying external support functions.
This reference voltageis lowered externallybya
resistor dividerto providea reference within the
common mode range the error amplifieroran ex-
ternal reference may be used. The power supply
outputis sensedbya second resistor divider net-
workto generalea feedback signalto error ampli-
fier. The amplifier output voltageis then com-
pared to the linear voltage ramp at CT. The
resulting modulated pulse out of the high-gain
comparatoris then steeredto the appropriateout-
put pass transistors (QA or QB) by the pulse-
steering flip-flop, whichis synchronously toggled the oscillator output. The oscillator output
pulse also serves asa blanking pulseto assure
both output are never on simultaneously during
the transition times. The widthof the blanking
pulseis controlledby the valueof CT. The outputs
may be appliedina push-pull configurationin
which their frequencyis half thatof the base oscil-
lator,or paralleledfor single-ended applicationsin
which the frequencyis equalto thatof the oscilla-
tor. The outputof the error amplifier sharesa
common inputto the comparator with the current
limitingat shutdown circuitry and can be overrid-
den by signals from eitherof these inputs. This
common pointis also available externally and
may be employedto control the gain of,orto
compensate, the error amplifier,orto provide ad-
ditional controlto the regulator.
RECOMMENDED OPERATING CONDITIONS
Supply voltage VIN 8to 40V
Reference Output Current 0to 20mA
Current troughCT Terminal - 0.03to -2mA
Timing Resistor,RT 1.8to 100KΩ
Timing Capacitor,CT 0.001to 0.1μF
TYPICAL APPLICATIONS DATA
OSCILLATOR
The oscillator controls the frequency of the
SG2524 andis programmedby RT and CT ac-
cordingto the approximate formula:= 1.18 CT
where:isin KΩisinμFisin KHz
Pratical valuesof CT fall between 0.001 and
0.1μF. Pratical valuesof RT fall between 1.8 and
100KΩ. This resultsina frequency range typically
from 120Hztoto 500KHz.
BLANKING
The output pulseof oscillatoris usedasa blank-
ing pulseat the output. This pulse widthis con-
trolledby the valueof CT.If small valuesof CT are
required for frequency control, the oscillator out-
put pulse width may stillbe increasedby applying shunt capacitanceof upto 100pF from pin3to
ground.If still greater dead-timeis required,it
shouldbe accomplishedby limiting the maximum
duty cycleby clamping the outputof the error am-
plifier. This can easilybe done with the circuit be-
low:
SYNCRONOUS OPERATION
When an external clockis desired,a clock pulse approximately3V canbe applied directlyto the
oscillator output terminal. The impedance to
groundat this pointis approximately 2KΩ.In this
configurationRT CT mustbe selected fora clock
period slightly greater than that the external clock. two more SG2524 regulators aretobe operated
synchronously, all oscillator output terminals
should be tied together, all CT terminals con-
nectedtoa single timing capacitor, and timing re-
sistor connectedtoa single RT terminal. The
other RT terminals canbe left openor shortedto
VREF. Minimum lead lengths shouldbe used be-
tween theCT terminals.
Figure6.
SG2524- SG3524
5/9
Figure7: Flyback Converter Circuit.
Figure8: PUSH-PULL Transformer-coupled circuit.
SG2524- SG3524
6/9

Partno	Mfg	Dc	Qty	Available	Descript
SG2524	ST	N/a	116	avai	REGULATING PULSE WIDTH MODULATOR
SG2524P	ST	N/a	1082	avai	REGULATING PULSE WIDTH MODULATORS