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SERCON816
INTERFACE CONTROLLER
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SERCON816January 2003 Single-chip controller for SERCOS interface Real time communication for industrial control
systems 8/16-bit bus interface, Intel and Motorola control
signals Dual port RAM with 2048 word *16-bit Data communications via optical fiber rings, RS
485 rings and RS 485 busses Maximum transmission rate of 16 Mbaud with
internal clock recovery Internal repeater for ring connections Full duplex operation Modulation of power of optical transmitter diode Automatic transmission of synchronous and
data telegrams in the communication cycle Flexible RAM configuration, communication
data stored in RAM (single or double buffer) or
transfer via DMA Synchronization by external signal Timing control signals Automatic service channel transmission Watchdog to monitor software and external
synchronization signals Compatible mode to SERCON410B SERCOS
interface controller 100-pin plastic flat-pack casing
Figure 1. SERCON816 Block DiagramSERCOS INTERFACE CONTROLLER
SERCON816 2/23
TABLE OF CONTENTS GENERAL DESCRIPTION.................................................................................................................3 Pin Description ...................................................................................................................................5 Electrical (DC and AC) Characteristics ..............................................................................................7
3.1 Absolute Maximum Ratings .....................................................................................................7
3.2 Recommended Operating Conditions......................................................................................8
3.3 ELECTRICAL CHARACTERISTCS ........................................................................................8
3.4 Power Dissipation ....................................................................................................................9
3.4.1 Power Dissipation Considerations....................................................................................9
3.5 AC Electrical Characteristics..................................................................................................10
3.5.1 Clock Input MCLK...........................................................................................................10
3.5.2 Clock Input SCLK ...........................................................................................................11
3.5.3 Address Latch.................................................................................................................11
3.5.4 Read Access of Control Registers..................................................................................12
3.5.5 Read Access of Dual Port RAM .....................................................................................13
3.5.6 Write Access to Control Registers..................................................................................14
3.5.7 Write Access to DUAL Port RAM ...................................................................................15 Control Registers and RAM Data Structures....................................................................................16
4.1 Control Register Addresses ...................................................................................................16
4.2 Data Structures within the RAM.............................................................................................16
4.2.1 Telegram Headers..........................................................................................................16
4.2.2 Data Containers..............................................................................................................17
4.2.3 End Marker.....................................................................................................................18
4.2.4 Service Containers .........................................................................................................18 Additional Specifications, Tools and Support ...................................................................................21
5.1 Additional Specifications ........................................................................................................21
5.2 Hardware and Software Components....................................................................................21
5.3 Tools ......................................................................................................................................21 Package Mechanical Data:
SERCON816 100 Pin Plastic Quad Flat Pack Package (PQFP100) ...............................................22
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SERCON816 GENERAL DESCRIPTIONThe SERCOS interface controller SERCON816 is an integrated circuit for SERCOS interface communication
systems. The SERCOS interface is a digital interface for communication between systems which have to ex-
change information cyclically at short, fixed intervals (62,5 s to 65 ms). It is appropriate for the synchronous
operation of distributed control or test equipment (e.g. connection between drives and numeric control).
A SERCOS interface communication system consists of one master and several slaves. These units are
connected by a fiber optical ring. This ring starts and ends at the master. The slaves regenerate and repeat
their received data or send their own telegrams. By this method the telegrams sent by the master are re-
ceived by all slaves while the master receives data telegrams from the slaves. The optical fiber assures a
reliable high-speed data transmission with excellent noise immunity.
The SERCOS interface controller contains all the hardware-related functions of the SERCOS interface and
considerably reduces the hardware costs and the computing time requirements of the microprocessor. It is
the direct link between the electro-optical receiver and transmitter and the microprocessor that executes the
control algorithms. The SERCON816 can be used both for SERCOS interface masters and slaves.
The circuit contains the following functions (Fig. 1): Interface to the microprocessor with a data bus width of 8 or 16 bits and with control lines according to
Intel or Motorola standards. A serial interface for making a direct connection with the optical receiver and transmitter of the fiber optic ring
or with drivers to an electric ring or bus. Data and clock regeneration, the repeater for ring topologies and the
serial transmitter and receiver are integrated. The signals are monitored and test signals generated. The se-
rial interface operates up to 16 Mbaud without external circuitry. A dual port RAM (2048 * 16 bit) for control and communication data. The organization of the memory is flexible. Telegram processing for automatic transmission and monitoring of synchronous and data telegrams. Only
transmission data which is intended for the particular interface user is processed. The transmitted data is ei-
ther stored in the internal RAM (single or double buffer) or transferred via direct memory access (DMA). The
transmission of service channel information over several communication cycles is executed automatically.
In addition to the SERCOS interface the SERCON816 can also be used for other real-time communica-
tions tasks. As an alternative to the fiber optical ring also bus topologies with RS-485 signals are supported
(Fig. 4). The SERCON816 is therefore suitable for a wide range of applications.
Remark: The SERCON816 is based on the former SERCON410B SERCOS interface controller.
Figure 2. SERCON816 Pin Configuration
SERCON816 4/23
Figure 3. SERCON816 with Ring Connection (SERCOS interface)
Figure 4. SERCON816 with RS-485 bus connection
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SERCON816 PIN DESCRIPTION
Table 1. SERCON816 I/O Port Function Summary
SERCON816 6/23
Table 1. SERCON816 I/O Port Function Summary (continued)
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SERCON816 ELECTRICAL (DC AND AC) CHARACTERISTICS
3.1 Absolute Maximum Ratings
Table 1. SERCON816 I/O Port Function Summary (continued)
SERCON816 8/23
3.2 Recommended Operating ConditionsNotes:1. Only if PLL is used (SBAUD16=0) For normal operation, during testing fMCLK = 0 is possible
3.3 ELECTRICAL CHARACTERISTCS (VDD = 5V ± 5% Tamb = -40 °C to +85 °C, unless otherwise specified)
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SERCON816Notes:1. estimated
3.4.1 Power Dissipation ConsiderationsMost of the current consumed by CMOS devices is alternate current (AC) which is charging and discharg-
ing the capacitances of the pins and internal nodes. The current consumption rises with the frequency at
which the pins and internal nodes will toggle and with the capacitances connected to the pins of the device:
P = f · C · V2 (C=capacitance, V=voltage, f=frequency)
For applications which require low power consumption or exceeds the maximum allowed power consump-
tion the following is required: Connect unused pins to pull-up or pull-down resistors Minimize the capacitive load on the pins Reduce clock frequency of SCLK and MCLK Minimize accesses to the internal RAM and control registers
The maximum allowed power consumption is limited by the maximum allowed chip junction temperature
and by the number of VCC/VDD pins. The chip junction temperature is influenced by the ambient temper-
ature and the package thermal resistance. The ambient temperature could be influenced by the applica-
tion through a good temperature management like heat sinks or ambient air cooling.
3.4 Power Dissipation(VDD = 5V ± 5% Tamb = -40 °C to +85 °C, unless otherwise specified)
3.3 ELECTRICAL CHARACTERISTCS (continued)(VDD = 5V ± 5% Tamb = -40 °C to +85 °C, unless otherwise specified)
SERCON816 10/23
Typical current consumption: measured at 5V (VCC/VDD) and 25°C
3.5 AC Electrical Characteristics(Cload = 50 pF, VDD = 5 V ± 5% Tamb = -40 °C to +85 °C)
3.5.1 Clock Input MCLK
Figure 5. Timing of clock MCLK and related outputs
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SERCON816
3.5.2 Clock Input SCLK
Figure 6. Timing of Clock SCLK
3.5.3 Address Latch
Figure 7. Address Latch
SERCON816 12/23
3.5.4 Read Access of Control Registers
Figure 8. Read Access of Control RegistersNote:1. Setup time input signals to falling edge RDN (Intel or Motorola mode with low active strobe) or rising edge RDN (Motorola mode
with high active strobe)
