SDA2112-2 ,TV PLL for 125 kHZ ResolutionFeatures
. No external integrator necessary
. internal buffer
. Microprocessor compatible
7 ..
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SDA2112-2
TV PLL for 125 kHZ Resolution
swsidiise,
SDA 21 12-2
TV PLL for 125 kHz Resolution
The SDA 2112-2 is fabricated in ASBC technology. In connection with a VCO (tuner) and
a high-speed 1 :64 divider, it forms a digitally programmable phase-Iocked loop for TV sets
designed to use the PLL frequency sythesis tuning principle. The PLL enables crystal-
controlled setting of the tuner oscillator frequency for a 125 kHz resolution in the frequency
bands l/Ill, N, and V.
A serial interface provides for simple connection to a microprocessor. The latter loads the
programmable divider and the band-selection outputs with the appropriate information.
Features
0 No external integrator necessary
0 Internal buffer
0 Microprocessor compatible
SDA 2112-2
Maximum ratings
Supply voltage
pin 18
Inputs
Q 1.0 2, F, te"
mm. 2,15,16
CPL, IFO, PLE
pin 7, 8, 10
Outputs
UHF, VHF, Bd I/lll
Din 3, 4, 5
CLK (pin 6)
LDM (pin 17)
LOCK IND (pin 12)
PD (pin 14)
VD (pin11)
OSC (pin 13)
Junction temperature
Storage temperature range
Thermal resistance (system-air)
Operating range
Supply voltage range
Input frequency
Divider factor
Crystal frequency
Tuning voltage
Ambient temperature
-0.3 to 7.5
-0.3 to Vs1 + 0.2
-O.3 to 5.5
-0.3 to 16
HM to 16
-th3 to 7.5
Hh3 to Vs1+0.2
-03 to 33
-0.3 to VS1+0.2
-40 to 125
4.5to 7.15
256 to 8191
0.3 to 33
O to 70
