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SCANSTA112VS/NOPB |SCANSTA112VSNOPBNSN/a1000avai7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer 100-TQFP -40 to 85


SCANSTA112VS/NOPB ,7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer 100-TQFP -40 to 85FEATURES DESCRIPTIONThe SCANSTA112 extends the IEEE Std. 1149.1 test2• True IEEE 1149.1 Hierarchica ..
SCANSTA476TSD ,Eight Input IEEE 1149.1 Analog Voltage Monitor [Preliminary]featuresPOWER SUPPLYPositive supply pin. These pins should be connected to a quiet +2.7V to +5.5V s ..
SCC2681AC1A44 ,Dual asynchronous receiver/transmitter (DUART)INTEGRATED CIRCUITSSCC2681Dual asynchronous receiver/transmitter(DUART)Product data 2004 Apr 06

SCANSTA112VS/NOPB
7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer 100-NFBGA -40 to 85
SCANSTA112
www.ti.com
SNLS161I –DECEMBER 2002–REVISED APRIL 2013
SCANSTA112 7-Port Multidrop IEEE 1149.1 (JTAG) Multiplexer
Checkfor Samples: SCANSTA112
1FEATURES DESCRIPTION

The SCANSTA112 extends the IEEE Std. 1149.1 test True IEEE 1149.1 Hierarchical and Multidrop bus intoa multidrop test bus environment. TheAddressable Capability advantage ofa multidrop approach overa single• The8 Address Inputs Support upto 249 serial scan chainis improved test throughput and theUnique Slot Addresses, an Interrogation abilityto removea board from the system and retain
Address, Broadcast Address, and4 Multi-Cast
test access to the remaining modules. Each
Group Addresses (Address 000000is
SCANSTA112 supports upto7 local IEEE1149.1
scan chains which can be accessed individuallyorReserved)
combined serially.• 7 IEEE 1149.1-Compatible Configurable Local
Scan Ports
Addressingis accomplishedby loading the instruction
register witha value matching thatof the Slot inputs.• Bi-directional Backplane and LSP0 Ports are Backplane and inter-board testing can easily beInterchangeable Slave Ports accomplishedby parking the local TAP Controllersin• Capableof Ignoring TRSTof the Backplane oneof the stable TAP Controller states viaa ParkPort whenit Becomes the Slave. instruction. The 32-bit TCK counter enables builtin Stitcher Mode Bypasses Level1 and2 self test operationstobe performed on one port while
other scan chains are simultaneously tested.Protocols Mode Register0 Allows Local TAPstobe The STA112 hasa unique feature in that the
Bypassed, Selected for Insertion into the Scan
backplane port and the LSP0 port are bidirectional.
They can be configuredto alternatively act as theChain Individually,or Seriallyin Groupsof
masteror slave portso an alternate test master canTwoor Three take controlof the entire scan chain network from the• Transparent Mode canbe Enabled witha LSP0 port while the backplane port becomesa slave.Single Instructionto Conveniently Buffer the
Backplane IEEE 1149.1 Pinsto Those ona
Single Local Scan Port General Purpose Local Port Pass Through Bits
are Useful for Delivering Write Pulses for Flash
Programmingor Monitoring Device Status. Known Power-Up State Ports the OE Take TRI- 3.0-3.6V VCC
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