SCANSTA111MTX ,Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) PortGeneral Descriptionn Mode Register allows local TAPs to be bypassed,0The SCANSTA111 extends the IEE ..
SCANSTA111SM ,Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) PortFeaturesallow an alternate test master to take control of the localTAPs (LSP have a TRI-STATE notif ..
SCANSTA111SM ,Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) PortFeaturesallow an alternate test master to take control of the localTAPs (LSP have a TRI-STATE notif ..
SCANSTA112SM ,7-port Multidrop IEEE 1149.1 (JTAG) MultiplexerGeneral Descriptionn Bi-directional Backplane and LSP ports are0The SCANSTA112 extends the IEEE Std ..
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SFS9620 ,Advanced Power MOSFETFEATURESBV = -200 VDSS Avalanche Rugged TechnologyR = 1.5 ΩDS(on) Rugged Gate Oxide T ..
SFS9624 ,Advanced Power MOSFETFEATURESBV = -250 VDSS Avalanche Rugged TechnologyR = 2.4 ΩDS(on) Rugged Gate Oxide T ..
SFS9630 ,Advanced Power MOSFETFEATURESBV = -200 VDSS Avalanche Rugged TechnologyR = 0.8 ΩDS(on) Rugged Gate Oxide T ..
SFS9634 ,Advanced Power MOSFETSFS9634Advanced Power MOSFET
SFS9634. ,Advanced Power MOSFETSFS9634Advanced Power MOSFET
SFS9644 ,Advanced Power MOSFETFEATURESBV = -250 VDSS Avalanche Rugged TechnologyR = 0.8 ΩDS(on) Rugged Gate Oxide T ..
SCANSTA111MT-SCANSTA111MTX-SCANSTA111SM
Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
SCANSTA111
Enhanced SCAN bridge
Multidrop Addressable IEEE 1149.1 (JTAG) Port
General DescriptionThe SCANSTA111 extends the IEEE Std. 1149.1 test bus
intoa multidrop test bus environment. The advantageofa
multidrop approach overa single serial scan chainis im-
proved test throughput and the abilityto removea board
from the system and retain test accessto the remaining
modules. Each SCANSTA111 supports upto3 local
IEEE1149.1 scan rings which canbe accessed individually combined serially. Addressingis accomplishedby loading
the instruction register witha value matching thatofthe Slot
inputs. Backplane and inter-board testing can easilybe ac-
complishedby parkingthe localTAP Controllersin oneofthe
stable TAP Controller statesviaa Park instruction. The 32-bit
TCK counter enables builtin self test operationstobe per-
formedon one port while other scan chains are simulta-
neously tested.
Features True IEEE 1149.1 hierarchical and multidrop
addressable capability The7 slot inputs supportupto 121 unique addresses, Interrogation Address, Broadcast Address, and4
Multi-cast Group Addresses (address 000000is
reserved)3 IEEE 1149.1-compatible configurable local scan ports Mode Register0 allows local TAPstobe bypassed,
selectedfor insertion intothe scan chain individually,or
seriallyin groupsof twoor three Transparent Mode canbe enabled witha single
instructionto conveniently bufferthe backplane IEEE
1149.1 pinsto thoseona single local scan port LSP ACTIVE outputs provide local port enable signals
for analog busses supporting IEEE 1149.4. General purpose local port passthrough bits are useful
for delivering write pulsesfor FPGA programmingor
monitoring device status. Known Power-up state TRSTonall local scan ports 32-bit TCK counter 16-bit LFSR Signature Compactor Local TAPs can become TRI-STATEviathe OE inputto
allowan alternate test masterto take controlofthe local
TAPs (LSP0-2 havea TRI-STATE notification output) 3.0-3.6V VCC Supply Operation Power-off high impedance inputs and outputs Supports live insertion/withdrawal
Connection DiagramsApril 2004
SCANST
Enhanced
SCAN
bridge
Multidrop
Addressable
IEEE
(JT
AG)
Port
